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author | Kumar Gala <galak@kernel.crashing.org> | 2009-03-19 09:16:10 -0500 |
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committer | Kumar Gala <galak@kernel.crashing.org> | 2009-03-30 13:33:50 -0500 |
commit | 1b3e4044a28a3d95b0aad41bdc52482bb2cc9b2b (patch) | |
tree | e81d608df798c58a5d2a35204ef6891fb2bc0bd8 /cpu/mpc85xx/release.S | |
parent | c360ceac0286159f94d9d1a9496fc9858c8d9bec (diff) | |
download | u-boot-imx-1b3e4044a28a3d95b0aad41bdc52482bb2cc9b2b.zip u-boot-imx-1b3e4044a28a3d95b0aad41bdc52482bb2cc9b2b.tar.gz u-boot-imx-1b3e4044a28a3d95b0aad41bdc52482bb2cc9b2b.tar.bz2 |
85xx: Add support for additional e500mc features
* Enable backside L2
* e500mc no longer has timebase enable in HID (moved to CCSR register)
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Diffstat (limited to 'cpu/mpc85xx/release.S')
-rw-r--r-- | cpu/mpc85xx/release.S | 16 |
1 files changed, 16 insertions, 0 deletions
diff --git a/cpu/mpc85xx/release.S b/cpu/mpc85xx/release.S index 54c936c..fbefc2c 100644 --- a/cpu/mpc85xx/release.S +++ b/cpu/mpc85xx/release.S @@ -76,6 +76,22 @@ __secondary_start_page: slwi r8,r4,5 add r10,r3,r8 +#ifdef CONFIG_BACKSIDE_L2_CACHE + /* Enable/invalidate the L2 cache */ + msync + lis r3,L2CSR0_L2FI@h + mtspr SPRN_L2CSR0,r3 +1: + mfspr r3,SPRN_L2CSR0 + andis. r1,r3,L2CSR0_L2FI@h + bne 1b + + lis r3,CONFIG_SYS_INIT_L2CSR0@h + ori r3,r3,CONFIG_SYS_INIT_L2CSR0@l + mtspr SPRN_L2CSR0,r3 + isync +#endif + #define EPAPR_MAGIC (0x45504150) #define ENTRY_ADDR_UPPER 0 #define ENTRY_ADDR_LOWER 4 |