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authorKumar Gala <galak@kernel.crashing.org>2008-04-28 02:24:04 -0500
committerAndrew Fleming-AFLEMING <afleming@freescale.com>2008-04-29 09:42:19 -0500
commitcf6cc014270549684873a5972d2595052c468cb6 (patch)
tree45f654136fdd2a3aa27de90ad838194fa28042f0 /cpu/mpc85xx/release.S
parentfd2d2d1025b3cafa1d5846c4e4a8cda63b539160 (diff)
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85xx: Additional fixes and cleanup of MP code
* adjust __spin_table alignment to match ePAPR v0.94 spec * loop over all cpus when determing who is up. This fixes an issue if the "boot cpu" isn't core0. The "boot cpu" will already be in the cpu_up_mask so there is no harm * Added some protection in the code to ensure proper behavior. These changes are explicitly needed but don't hurt: - Added eieio to ensure the "hot word" of the table is written after all other table updates have occurred. - Added isync to ensure we don't prefetch loading of table entries until we a released These issues we raised by Dave Liu. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Diffstat (limited to 'cpu/mpc85xx/release.S')
-rw-r--r--cpu/mpc85xx/release.S3
1 files changed, 2 insertions, 1 deletions
diff --git a/cpu/mpc85xx/release.S b/cpu/mpc85xx/release.S
index 3b7366f..a47edae 100644
--- a/cpu/mpc85xx/release.S
+++ b/cpu/mpc85xx/release.S
@@ -114,6 +114,7 @@ __secondary_start_page:
lwz r4,ENTRY_ADDR_LOWER(r10)
andi. r11,r4,1
bne 2b
+ isync
/* get the upper bits of the addr */
lwz r11,ENTRY_ADDR_UPPER(r10)
@@ -169,7 +170,7 @@ __secondary_start_page:
mtspr SPRN_SRR1,r13
rfi
- .align 3
+ .align L1_CACHE_SHIFT
.globl __spin_table
__spin_table:
.space CONFIG_NR_CPUS*ENTRY_SIZE