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author | Haavard Skinnemoen <hskinnemoen@atmel.com> | 2007-10-02 19:05:53 +0200 |
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committer | Haavard Skinnemoen <hskinnemoen@atmel.com> | 2007-10-02 19:05:53 +0200 |
commit | b90296fc39a33f84bb2b0aa79bf997be495ba791 (patch) | |
tree | 4ea0d61df25d10fe7552aedf781fd167f4c670fe /cpu/mpc85xx/interrupts.c | |
parent | e80e585b00fbbab7ad1bf71619741f2c5b029ab7 (diff) | |
parent | 527c80f012030fa0b51f8594847ec56c9317e9b1 (diff) | |
download | u-boot-imx-b90296fc39a33f84bb2b0aa79bf997be495ba791.zip u-boot-imx-b90296fc39a33f84bb2b0aa79bf997be495ba791.tar.gz u-boot-imx-b90296fc39a33f84bb2b0aa79bf997be495ba791.tar.bz2 |
Merge commit 'origin/master'
Diffstat (limited to 'cpu/mpc85xx/interrupts.c')
-rw-r--r-- | cpu/mpc85xx/interrupts.c | 33 |
1 files changed, 33 insertions, 0 deletions
diff --git a/cpu/mpc85xx/interrupts.c b/cpu/mpc85xx/interrupts.c index dc246dc..bf737d6 100644 --- a/cpu/mpc85xx/interrupts.c +++ b/cpu/mpc85xx/interrupts.c @@ -89,6 +89,39 @@ int interrupt_init (void) mtspr(SPRN_TCR, TCR_PIE); set_dec (decrementer_count); set_msr (get_msr () | MSR_EE); + +#ifdef CONFIG_INTERRUPTS + volatile ccsr_pic_t *pic = &immr->im_pic; + + pic->iivpr1 = 0x810002; /* 50220 enable ecm interrupts */ + debug("iivpr1@%x = %x\n",&pic->iivpr1, pic->iivpr1); + + pic->iivpr2 = 0x810002; /* 50240 enable ddr interrupts */ + debug("iivpr2@%x = %x\n",&pic->iivpr2, pic->iivpr2); + + pic->iivpr3 = 0x810003; /* 50260 enable lbc interrupts */ + debug("iivpr3@%x = %x\n",&pic->iivpr3, pic->iivpr3); + +#ifdef CONFIG_PCI1 + pic->iivpr8 = 0x810008; /* enable pci1 interrupts */ + debug("iivpr8@%x = %x\n",&pic->iivpr8, pic->iivpr8); +#endif +#if defined(CONFIG_PCI2) || defined(CONFIG_PCIE2) + pic->iivpr9 = 0x810009; /* enable pci1 interrupts */ + debug("iivpr9@%x = %x\n",&pic->iivpr9, pic->iivpr9); +#endif +#ifdef CONFIG_PCIE1 + pic->iivpr10 = 0x81000a; /* enable pcie1 interrupts */ + debug("iivpr10@%x = %x\n",&pic->iivpr10, pic->iivpr10); +#endif +#ifdef CONFIG_PCIE3 + pic->iivpr11 = 0x81000b; /* enable pcie3 interrupts */ + debug("iivpr11@%x = %x\n",&pic->iivpr11, pic->iivpr11); +#endif + + pic->ctpr=0; /* 40080 clear current task priority register */ +#endif + return (0); } |