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authorAndrew Klossner <andrew@cesa.opbu.xerox.com>2008-08-21 07:12:26 -0700
committerAndrew Fleming-AFLEMING <afleming@freescale.com>2008-09-09 17:02:41 -0500
commit5251469943895de4bb9a04d5053352cc22acb7d5 (patch)
treeb91675de870141de079e80668bfbf5765c445537 /cpu/mpc85xx/interrupts.c
parente0ff3d350d6b7960deb5a881dfc5acf3a63ef676 (diff)
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Fix printf errors under -DDEBUG
Fix printf format-string/arg mismatches under -DDEBUG. These warnings occur with DEBUG defined for a platform using cpu/mpc85xx. Users of other architectures can unearth similar problems by adding the line "CFLAGS += -DDEBUG=1" in config.mk right after "CFLAGS += $(call cc-option,-fno-stack-protector)". Signed-off-by: Andrew Klossner <andrew@cesa.opbu.xerox.com> Signed-off-by: Andy Fleming <afleming@freescale.com>
Diffstat (limited to 'cpu/mpc85xx/interrupts.c')
-rw-r--r--cpu/mpc85xx/interrupts.c14
1 files changed, 7 insertions, 7 deletions
diff --git a/cpu/mpc85xx/interrupts.c b/cpu/mpc85xx/interrupts.c
index 06d4d8b..d702ca6 100644
--- a/cpu/mpc85xx/interrupts.c
+++ b/cpu/mpc85xx/interrupts.c
@@ -48,29 +48,29 @@ int interrupt_init_cpu(unsigned long *decrementer_count)
#ifdef CONFIG_INTERRUPTS
pic->iivpr1 = 0x810001; /* 50220 enable ecm interrupts */
- debug("iivpr1@%x = %x\n",&pic->iivpr1, pic->iivpr1);
+ debug("iivpr1@%x = %x\n", (uint)&pic->iivpr1, pic->iivpr1);
pic->iivpr2 = 0x810002; /* 50240 enable ddr interrupts */
- debug("iivpr2@%x = %x\n",&pic->iivpr2, pic->iivpr2);
+ debug("iivpr2@%x = %x\n", (uint)&pic->iivpr2, pic->iivpr2);
pic->iivpr3 = 0x810003; /* 50260 enable lbc interrupts */
- debug("iivpr3@%x = %x\n",&pic->iivpr3, pic->iivpr3);
+ debug("iivpr3@%x = %x\n", (uint)&pic->iivpr3, pic->iivpr3);
#ifdef CONFIG_PCI1
pic->iivpr8 = 0x810008; /* enable pci1 interrupts */
- debug("iivpr8@%x = %x\n",&pic->iivpr8, pic->iivpr8);
+ debug("iivpr8@%x = %x\n", (uint)&pic->iivpr8, pic->iivpr8);
#endif
#if defined(CONFIG_PCI2) || defined(CONFIG_PCIE2)
pic->iivpr9 = 0x810009; /* enable pci1 interrupts */
- debug("iivpr9@%x = %x\n",&pic->iivpr9, pic->iivpr9);
+ debug("iivpr9@%x = %x\n", (uint)&pic->iivpr9, pic->iivpr9);
#endif
#ifdef CONFIG_PCIE1
pic->iivpr10 = 0x81000a; /* enable pcie1 interrupts */
- debug("iivpr10@%x = %x\n",&pic->iivpr10, pic->iivpr10);
+ debug("iivpr10@%x = %x\n", (uint)&pic->iivpr10, pic->iivpr10);
#endif
#ifdef CONFIG_PCIE3
pic->iivpr11 = 0x81000b; /* enable pcie3 interrupts */
- debug("iivpr11@%x = %x\n",&pic->iivpr11, pic->iivpr11);
+ debug("iivpr11@%x = %x\n", (uint)&pic->iivpr11, pic->iivpr11);
#endif
pic->ctpr=0; /* 40080 clear current task priority register */