summaryrefslogtreecommitdiff
path: root/cpu/mpc85xx/fdt.c
diff options
context:
space:
mode:
authorKumar Gala <galak@kernel.crashing.org>2009-09-17 01:52:37 -0500
committerKumar Gala <galak@kernel.crashing.org>2009-09-24 12:05:29 -0500
commit3c2a67eec8a0facc865b400caca52e7f6b7adf01 (patch)
tree131a11003534635f5ae7a948ee4202e1e2d1c711 /cpu/mpc85xx/fdt.c
parent7e4259bba4c56536760e42d32dacfb3233f216fd (diff)
downloadu-boot-imx-3c2a67eec8a0facc865b400caca52e7f6b7adf01.zip
u-boot-imx-3c2a67eec8a0facc865b400caca52e7f6b7adf01.tar.gz
u-boot-imx-3c2a67eec8a0facc865b400caca52e7f6b7adf01.tar.bz2
ppc/p4080: Handle timebase enabling and frequency reporting
On CoreNet style platforms the timebase frequency is the bus frequency defined by 16 (on PQ3 it is divide by 8). Also on the CoreNet platforms the core not longer controls the enabling of the timebase. We now need to enable the boot core's timebase via CCSR register writes. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Diffstat (limited to 'cpu/mpc85xx/fdt.c')
-rw-r--r--cpu/mpc85xx/fdt.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/cpu/mpc85xx/fdt.c b/cpu/mpc85xx/fdt.c
index 61e0fb0..efb6518 100644
--- a/cpu/mpc85xx/fdt.c
+++ b/cpu/mpc85xx/fdt.c
@@ -294,7 +294,7 @@ void ft_cpu_setup(void *blob, bd_t *bd)
fdt_add_enet_stashing(blob);
do_fixup_by_prop_u32(blob, "device_type", "cpu", 4,
- "timebase-frequency", bd->bi_busfreq / 8, 1);
+ "timebase-frequency", get_tbclk(), 1);
do_fixup_by_prop_u32(blob, "device_type", "cpu", 4,
"bus-frequency", bd->bi_busfreq, 1);
get_sys_info(&sysinfo);