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| author | Jon Loeliger <jdl@freescale.com> | 2005-07-25 10:58:39 -0500 |
|---|---|---|
| committer | Jon Loeliger <jdl@freescale.com> | 2005-07-25 10:58:39 -0500 |
| commit | d65cfe89ecdd9de1ddc2d3ebdfa9ab271e2d4415 (patch) | |
| tree | f26d0ecc4deba8667f9c608c3f4a8fbb91dd50bc /cpu/mpc85xx/cpu_init.c | |
| parent | 9c4c5ae3e10e4f2ca799aacbb74e1f5adb86e0b5 (diff) | |
| download | u-boot-imx-d65cfe89ecdd9de1ddc2d3ebdfa9ab271e2d4415.zip u-boot-imx-d65cfe89ecdd9de1ddc2d3ebdfa9ab271e2d4415.tar.gz u-boot-imx-d65cfe89ecdd9de1ddc2d3ebdfa9ab271e2d4415.tar.bz2 | |
* Patch by Jon Loeliger 2005-02-08
Determine L2 Cache size dynamically on 85XX boards.
Diffstat (limited to 'cpu/mpc85xx/cpu_init.c')
| -rw-r--r-- | cpu/mpc85xx/cpu_init.c | 17 |
1 files changed, 16 insertions, 1 deletions
diff --git a/cpu/mpc85xx/cpu_init.c b/cpu/mpc85xx/cpu_init.c index 4d6438f..79ea91f 100644 --- a/cpu/mpc85xx/cpu_init.c +++ b/cpu/mpc85xx/cpu_init.c @@ -189,6 +189,21 @@ int cpu_init_r (void) volatile uint temp; asm("msync;isync"); + temp = l2cache->l2ctl; + temp &= 0x30000000; + switch ( temp ) { + case 0x20000000: + printf ("L2 cache 256KB:"); + break; + case 0x00000000: + case 0x10000000: + case 0x30000000: + default: + printf ("L2 cache unknown size. Check the silicon!\n"); + return -1; + } + + asm("msync;isync"); l2cache->l2ctl = 0x68000000; /* invalidate */ temp = l2cache->l2ctl; asm("msync;isync"); @@ -196,7 +211,7 @@ int cpu_init_r (void) temp = l2cache->l2ctl; asm("msync;isync"); - printf("L2: 256 kB enabled\n"); + printf("enabled\n"); #else printf("L2: disabled.\n"); #endif |