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authorKumar Gala <galak@kernel.crashing.org>2007-12-07 04:59:26 -0600
committerKumar Gala <galak@kernel.crashing.org>2007-12-11 22:34:20 -0600
commitd435793229ce29a42797c1edc39f5b34f987f91a (patch)
treebe66e43419c21c827922d620431716444e6e50e0 /cpu/mpc85xx/cpu.c
parent22abb2d2eaf7b795a6923c6273ec9cb53fda9a10 (diff)
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Handle Asynchronous DDR clock on 85xx
The MPC8572 introduces the concept of an asynchronous DDR clock with regards to the platform clock. Introduce get_ddr_freq() to report the DDR freq regardless of sync/async mode. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Diffstat (limited to 'cpu/mpc85xx/cpu.c')
-rw-r--r--cpu/mpc85xx/cpu.c16
1 files changed, 15 insertions, 1 deletions
diff --git a/cpu/mpc85xx/cpu.c b/cpu/mpc85xx/cpu.c
index e55d337..ac8b018 100644
--- a/cpu/mpc85xx/cpu.c
+++ b/cpu/mpc85xx/cpu.c
@@ -39,6 +39,8 @@ int checkcpu (void)
uint fam;
uint ver;
uint major, minor;
+ u32 ddr_ratio;
+ volatile ccsr_gur_t *gur = (void *)(CFG_MPC85xx_GUTS_ADDR);
svr = get_svr();
ver = SVR_VER(svr);
@@ -102,7 +104,19 @@ int checkcpu (void)
puts("Clock Configuration:\n");
printf(" CPU:%4lu MHz, ", sysinfo.freqProcessor / 1000000);
printf("CCB:%4lu MHz,\n", sysinfo.freqSystemBus / 1000000);
- printf(" DDR:%4lu MHz, ", sysinfo.freqSystemBus / 2000000);
+
+ ddr_ratio = ((gur->porpllsr) & 0x00003e00) >> 9;
+ switch (ddr_ratio) {
+ case 0x0:
+ printf(" DDR:%4lu MHz, ", sysinfo.freqDDRBus / 2000000);
+ break;
+ case 0x7:
+ printf(" DDR:%4lu MHz (Synchronous), ", sysinfo.freqDDRBus / 2000000);
+ break;
+ default:
+ printf(" DDR:%4lu MHz (Asynchronous), ", sysinfo.freqDDRBus / 2000000);
+ break;
+ }
#if defined(CFG_LBC_LCRR)
lcrr = CFG_LBC_LCRR;