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author | Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> | 2008-10-16 15:01:15 +0200 |
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committer | Wolfgang Denk <wd@denx.de> | 2008-10-18 21:54:03 +0200 |
commit | 6d0f6bcf337c5261c08fabe12982178c2c489d76 (patch) | |
tree | ae13958ffa9c6b58c2ea97aac07a4ad2f04a350f /cpu/mpc85xx/commproc.c | |
parent | 71edc271816ec82cf0550dd6980be2da3cc2ad9e (diff) | |
download | u-boot-imx-6d0f6bcf337c5261c08fabe12982178c2c489d76.zip u-boot-imx-6d0f6bcf337c5261c08fabe12982178c2c489d76.tar.gz u-boot-imx-6d0f6bcf337c5261c08fabe12982178c2c489d76.tar.bz2 |
rename CFG_ macros to CONFIG_SYS
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Diffstat (limited to 'cpu/mpc85xx/commproc.c')
-rw-r--r-- | cpu/mpc85xx/commproc.c | 16 |
1 files changed, 8 insertions, 8 deletions
diff --git a/cpu/mpc85xx/commproc.c b/cpu/mpc85xx/commproc.c index b0ecd25..fff8dff 100644 --- a/cpu/mpc85xx/commproc.c +++ b/cpu/mpc85xx/commproc.c @@ -37,10 +37,10 @@ DECLARE_GLOBAL_DATA_PTR; void m8560_cpm_reset(void) { - volatile ccsr_cpm_t *cpm = (ccsr_cpm_t *)CFG_MPC85xx_CPM_ADDR; + volatile ccsr_cpm_t *cpm = (ccsr_cpm_t *)CONFIG_SYS_MPC85xx_CPM_ADDR; volatile ulong count; - gd = (gd_t *) (CFG_INIT_RAM_ADDR + CFG_GBL_DATA_OFFSET); + gd = (gd_t *) (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_GBL_DATA_OFFSET); /* Reclaim the DP memory for our use. */ @@ -64,7 +64,7 @@ m8560_cpm_reset(void) uint m8560_cpm_dpalloc(uint size, uint align) { - volatile ccsr_cpm_t *cpm = (ccsr_cpm_t *)CFG_MPC85xx_CPM_ADDR; + volatile ccsr_cpm_t *cpm = (ccsr_cpm_t *)CONFIG_SYS_MPC85xx_CPM_ADDR; uint retloc; uint align_mask, off; uint savebase; @@ -120,7 +120,7 @@ m8560_cpm_hostalloc(uint size, uint align) void m8560_cpm_setbrg(uint brg, uint rate) { - volatile ccsr_cpm_t *cpm = (ccsr_cpm_t *)CFG_MPC85xx_CPM_ADDR; + volatile ccsr_cpm_t *cpm = (ccsr_cpm_t *)CONFIG_SYS_MPC85xx_CPM_ADDR; volatile uint *bp; /* This is good enough to get SMCs running..... @@ -142,7 +142,7 @@ m8560_cpm_setbrg(uint brg, uint rate) void m8560_cpm_fastbrg(uint brg, uint rate, int div16) { - volatile ccsr_cpm_t *cpm = (ccsr_cpm_t *)CFG_MPC85xx_CPM_ADDR; + volatile ccsr_cpm_t *cpm = (ccsr_cpm_t *)CONFIG_SYS_MPC85xx_CPM_ADDR; volatile uint *bp; /* This is good enough to get SMCs running..... @@ -167,7 +167,7 @@ m8560_cpm_fastbrg(uint brg, uint rate, int div16) void m8560_cpm_extcbrg(uint brg, uint rate, uint extclk, int pinsel) { - volatile ccsr_cpm_t *cpm = (ccsr_cpm_t *)CFG_MPC85xx_CPM_ADDR; + volatile ccsr_cpm_t *cpm = (ccsr_cpm_t *)CONFIG_SYS_MPC85xx_CPM_ADDR; volatile uint *bp; if (brg < 4) { @@ -190,7 +190,7 @@ m8560_cpm_extcbrg(uint brg, uint rate, uint extclk, int pinsel) void post_word_store (ulong a) { volatile ulong *save_addr = - (volatile ulong *)(CFG_IMMR + CPM_POST_WORD_ADDR); + (volatile ulong *)(CONFIG_SYS_IMMR + CPM_POST_WORD_ADDR); *save_addr = a; } @@ -198,7 +198,7 @@ void post_word_store (ulong a) ulong post_word_load (void) { volatile ulong *save_addr = - (volatile ulong *)(CFG_IMMR + CPM_POST_WORD_ADDR); + (volatile ulong *)(CONFIG_SYS_IMMR + CPM_POST_WORD_ADDR); return *save_addr; } |