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author | Kumar Gala <galak@kernel.crashing.org> | 2008-08-26 21:34:55 -0500 |
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committer | Kumar Gala <galak@kernel.crashing.org> | 2008-08-27 11:43:48 -0500 |
commit | 2a6c2d7ab2a66660f40a6cd3de2eb29ee29d9693 (patch) | |
tree | b6790fbe8723c9d091518f6235eee3b6680f24d9 /cpu/mpc85xx/Makefile | |
parent | 6fb1b7346849ccd0c20306143e334f5b76143070 (diff) | |
download | u-boot-imx-2a6c2d7ab2a66660f40a6cd3de2eb29ee29d9693.zip u-boot-imx-2a6c2d7ab2a66660f40a6cd3de2eb29ee29d9693.tar.gz u-boot-imx-2a6c2d7ab2a66660f40a6cd3de2eb29ee29d9693.tar.bz2 |
FSL DDR: Add 85xx specific register setting
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Diffstat (limited to 'cpu/mpc85xx/Makefile')
-rw-r--r-- | cpu/mpc85xx/Makefile | 19 |
1 files changed, 19 insertions, 0 deletions
diff --git a/cpu/mpc85xx/Makefile b/cpu/mpc85xx/Makefile index d51a6dd..3a3c6a7 100644 --- a/cpu/mpc85xx/Makefile +++ b/cpu/mpc85xx/Makefile @@ -34,6 +34,25 @@ SOBJS = $(SOBJS-y) COBJS-$(CONFIG_MP) += mp.o COBJS-$(CONFIG_OF_LIBFDT) += fdt.o +# supports ddr1 +ifeq ($(CONFIG_FSL_DDR1),y) +COBJS-$(CONFIG_MPC8540) += ddr-gen1.o +COBJS-$(CONFIG_MPC8560) += ddr-gen1.o +COBJS-$(CONFIG_MPC8541) += ddr-gen1.o +COBJS-$(CONFIG_MPC8555) += ddr-gen1.o +endif + +# supports ddr1/2 +ifeq ($(CONFIG_FSL_DDR2),y) +COBJS-$(CONFIG_MPC8548) += ddr-gen2.o +COBJS-$(CONFIG_MPC8568) += ddr-gen2.o +COBJS-$(CONFIG_MPC8544) += ddr-gen2.o + +# supports ddr1/2/3 +COBJS-$(CONFIG_MPC8572) += ddr-gen3.o +COBJS-$(CONFIG_MPC8536) += ddr-gen3.o +endif + ifneq ($(CONFIG_FSL_DDR3),y) ifneq ($(CONFIG_FSL_DDR2),y) ifneq ($(CONFIG_FSL_DDR1),y) |