diff options
author | Markus Klotzbuecher <mk@denx.de> | 2008-01-09 13:57:10 +0100 |
---|---|---|
committer | Markus Klotzbuecher <mk@denx.de> | 2008-01-09 13:57:10 +0100 |
commit | 6a40ef62c4300e9f606deef0a4618cbc4b514a51 (patch) | |
tree | c01bdd0e773d092f13af05567fa92fb9072df9e0 /cpu/mpc83xx | |
parent | 245a362ad3c0c1b84fccc9fec7b623eb14f6e502 (diff) | |
parent | 07eb02687f008721974a2fb54cd7fdc28033ab3c (diff) | |
download | u-boot-imx-6a40ef62c4300e9f606deef0a4618cbc4b514a51.zip u-boot-imx-6a40ef62c4300e9f606deef0a4618cbc4b514a51.tar.gz u-boot-imx-6a40ef62c4300e9f606deef0a4618cbc4b514a51.tar.bz2 |
Merge git://www.denx.de/git/u-boot
Conflicts:
board/tqm5200/tqm5200.c
Diffstat (limited to 'cpu/mpc83xx')
-rw-r--r-- | cpu/mpc83xx/Makefile | 2 | ||||
-rw-r--r-- | cpu/mpc83xx/config.mk | 2 | ||||
-rw-r--r-- | cpu/mpc83xx/cpu.c | 362 | ||||
-rw-r--r-- | cpu/mpc83xx/cpu_init.c | 6 | ||||
-rw-r--r-- | cpu/mpc83xx/fdt.c | 72 | ||||
-rw-r--r-- | cpu/mpc83xx/pci.c | 83 | ||||
-rw-r--r-- | cpu/mpc83xx/spd_sdram.c | 7 | ||||
-rw-r--r-- | cpu/mpc83xx/speed.c | 201 | ||||
-rw-r--r-- | cpu/mpc83xx/u-boot.lds | 1 |
9 files changed, 322 insertions, 414 deletions
diff --git a/cpu/mpc83xx/Makefile b/cpu/mpc83xx/Makefile index 2329970..94a3cb8 100644 --- a/cpu/mpc83xx/Makefile +++ b/cpu/mpc83xx/Makefile @@ -29,7 +29,7 @@ LIB = $(obj)lib$(CPU).a START = start.o COBJS = traps.o cpu.o cpu_init.o speed.o interrupts.o \ - spd_sdram.o ecc.o qe_io.o pci.o + spd_sdram.o ecc.o qe_io.o pci.o fdt.o SRCS := $(START:.o=.S) $(SOBJS:.o=.S) $(COBJS:.o=.c) OBJS := $(addprefix $(obj),$(SOBJS) $(COBJS)) diff --git a/cpu/mpc83xx/config.mk b/cpu/mpc83xx/config.mk index 2ec395d..ecf8a60 100644 --- a/cpu/mpc83xx/config.mk +++ b/cpu/mpc83xx/config.mk @@ -20,7 +20,7 @@ # MA 02111-1307 USA # -PLATFORM_RELFLAGS += -fPIC -ffixed-r14 -meabi -mrelocatable +PLATFORM_RELFLAGS += -fPIC -ffixed-r14 -meabi PLATFORM_CPPFLAGS += -DCONFIG_MPC83XX -DCONFIG_E300 \ -ffixed-r2 -ffixed-r29 -msoft-float diff --git a/cpu/mpc83xx/cpu.c b/cpu/mpc83xx/cpu.c index e634f0a..bff3cef 100644 --- a/cpu/mpc83xx/cpu.c +++ b/cpu/mpc83xx/cpu.c @@ -1,5 +1,5 @@ /* - * Copyright (C) 2004-2006 Freescale Semiconductor, Inc. + * Copyright (C) 2004-2007 Freescale Semiconductor, Inc. * * See file CREDITS for list of people who contributed to this * project. @@ -31,11 +31,7 @@ #include <command.h> #include <mpc83xx.h> #include <asm/processor.h> -#if defined(CONFIG_OF_FLAT_TREE) -#include <ft_build.h> -#elif defined(CONFIG_OF_LIBFDT) #include <libfdt.h> -#endif DECLARE_GLOBAL_DATA_PTR; @@ -64,6 +60,10 @@ int checkcpu(void) printf("e300c3, "); break; + case PVR_E300C4: + printf("e300c4, "); + break; + default: printf("Unknown core, "); } @@ -148,6 +148,36 @@ int checkcpu(void) case SPR_8313E_REV10: puts("MPC8313E, "); break; + case SPR_8315E_REV10: + puts("MPC8315E, "); + break; + case SPR_8315_REV10: + puts("MPC8315, "); + break; + case SPR_8314E_REV10: + puts("MPC8314E, "); + break; + case SPR_8314_REV10: + puts("MPC8314, "); + break; + case SPR_8379E_REV10: + puts("MPC8379E, "); + break; + case SPR_8379_REV10: + puts("MPC8379, "); + break; + case SPR_8378E_REV10: + puts("MPC8378E, "); + break; + case SPR_8378_REV10: + puts("MPC8378, "); + break; + case SPR_8377E_REV10: + puts("MPC8377E, "); + break; + case SPR_8377_REV10: + puts("MPC8377, "); + break; default: printf("Rev: Unknown revision number:%08x\n" "Warning: Unsupported cpu revision!\n",spridr); @@ -324,328 +354,6 @@ void watchdog_reset (void) } #endif -#if defined(CONFIG_OF_LIBFDT) - -/* - * "Setter" functions used to add/modify FDT entries. - */ -static int fdt_set_eth0(void *blob, int nodeoffset, const char *name, bd_t *bd) -{ - /* Fix it up if it exists, don't create it if it doesn't exist */ - if (fdt_get_property(blob, nodeoffset, name, 0)) { - return fdt_setprop(blob, nodeoffset, name, bd->bi_enetaddr, 6); - } - return 0; -} -#ifdef CONFIG_HAS_ETH1 -/* second onboard ethernet port */ -static int fdt_set_eth1(void *blob, int nodeoffset, const char *name, bd_t *bd) -{ - /* Fix it up if it exists, don't create it if it doesn't exist */ - if (fdt_get_property(blob, nodeoffset, name, 0)) { - return fdt_setprop(blob, nodeoffset, name, bd->bi_enet1addr, 6); - } - return 0; -} -#endif -#ifdef CONFIG_HAS_ETH2 -/* third onboard ethernet port */ -static int fdt_set_eth2(void *blob, int nodeoffset, const char *name, bd_t *bd) -{ - /* Fix it up if it exists, don't create it if it doesn't exist */ - if (fdt_get_property(blob, nodeoffset, name, 0)) { - return fdt_setprop(blob, nodeoffset, name, bd->bi_enet2addr, 6); - } - return 0; -} -#endif -#ifdef CONFIG_HAS_ETH3 -/* fourth onboard ethernet port */ -static int fdt_set_eth3(void *blob, int nodeoffset, const char *name, bd_t *bd) -{ - /* Fix it up if it exists, don't create it if it doesn't exist */ - if (fdt_get_property(blob, nodeoffset, name, 0)) { - return fdt_setprop(blob, nodeoffset, name, bd->bi_enet3addr, 6); - } - return 0; -} -#endif - -static int fdt_set_busfreq(void *blob, int nodeoffset, const char *name, bd_t *bd) -{ - u32 tmp; - /* Create or update the property */ - tmp = cpu_to_be32(bd->bi_busfreq); - return fdt_setprop(blob, nodeoffset, name, &tmp, sizeof(tmp)); -} - -static int fdt_set_tbfreq(void *blob, int nodeoffset, const char *name, bd_t *bd) -{ - u32 tmp; - /* Create or update the property */ - tmp = cpu_to_be32(OF_TBCLK); - return fdt_setprop(blob, nodeoffset, name, &tmp, sizeof(tmp)); -} - - -static int fdt_set_clockfreq(void *blob, int nodeoffset, const char *name, bd_t *bd) -{ - u32 tmp; - /* Create or update the property */ - tmp = cpu_to_be32(gd->core_clk); - return fdt_setprop(blob, nodeoffset, name, &tmp, sizeof(tmp)); -} - -#ifdef CONFIG_QE -static int fdt_set_qe_busfreq(void *blob, int nodeoffset, const char *name, bd_t *bd) -{ - u32 tmp; - /* Create or update the property */ - tmp = cpu_to_be32(gd->qe_clk); - return fdt_setprop(blob, nodeoffset, name, &tmp, sizeof(tmp)); -} - -static int fdt_set_qe_brgfreq(void *blob, int nodeoffset, const char *name, bd_t *bd) -{ - u32 tmp; - /* Create or update the property */ - tmp = cpu_to_be32(gd->brg_clk); - return fdt_setprop(blob, nodeoffset, name, &tmp, sizeof(tmp)); -} -#endif - -/* - * Fixups to the fdt. - */ -static const struct { - char *node; - char *prop; - int (*set_fn)(void *blob, int nodeoffset, const char *name, bd_t *bd); -} fixup_props[] = { - { "/cpus/" OF_CPU, - "timebase-frequency", - fdt_set_tbfreq - }, - { "/cpus/" OF_CPU, - "bus-frequency", - fdt_set_busfreq - }, - { "/cpus/" OF_CPU, - "clock-frequency", - fdt_set_clockfreq - }, - { "/" OF_SOC, - "bus-frequency", - fdt_set_busfreq - }, - { "/" OF_SOC "/serial@4500", - "clock-frequency", - fdt_set_busfreq - }, - { "/" OF_SOC "/serial@4600", - "clock-frequency", - fdt_set_busfreq - }, -#ifdef CONFIG_TSEC1 - { "/" OF_SOC "/ethernet@24000", - "mac-address", - fdt_set_eth0 - }, - { "/" OF_SOC "/ethernet@24000", - "local-mac-address", - fdt_set_eth0 - }, -#endif -#ifdef CONFIG_TSEC2 - { "/" OF_SOC "/ethernet@25000", - "mac-address", - fdt_set_eth1 - }, - { "/" OF_SOC "/ethernet@25000", - "local-mac-address", - fdt_set_eth1 - }, -#endif -#ifdef CONFIG_QE - { "/" OF_QE, - "brg-frequency", - fdt_set_qe_brgfreq - }, - { "/" OF_QE, - "bus-frequency", - fdt_set_qe_busfreq - }, -#ifdef CONFIG_UEC_ETH1 -#if CFG_UEC1_UCC_NUM == 0 /* UCC1 */ - { "/" OF_QE "/ucc@2000", - "mac-address", - fdt_set_eth0 - }, - { "/" OF_QE "/ucc@2000", - "local-mac-address", - fdt_set_eth0 - }, -#elif CFG_UEC1_UCC_NUM == 2 /* UCC3 */ - { "/" OF_QE "/ucc@2200", - "mac-address", - fdt_set_eth0 - }, - { "/" OF_QE "/ucc@2200", - "local-mac-address", - fdt_set_eth0 - }, -#endif -#endif /* CONFIG_UEC_ETH1 */ -#ifdef CONFIG_UEC_ETH2 -#if CFG_UEC2_UCC_NUM == 1 /* UCC2 */ - { "/" OF_QE "/ucc@3000", - "mac-address", - fdt_set_eth1 - }, - { "/" OF_QE "/ucc@3000", - "local-mac-address", - fdt_set_eth1 - }, -#elif CFG_UEC2_UCC_NUM == 3 /* UCC4 */ - { "/" OF_QE "/ucc@3200", - "mac-address", - fdt_set_eth1 - }, - { "/" OF_QE "/ucc@3200", - "local-mac-address", - fdt_set_eth1 - }, -#endif -#endif /* CONFIG_UEC_ETH2 */ -#endif /* CONFIG_QE */ -}; - -void -ft_cpu_setup(void *blob, bd_t *bd) -{ - int nodeoffset; - int err; - int j; - int tmp[2]; - - for (j = 0; j < (sizeof(fixup_props) / sizeof(fixup_props[0])); j++) { - nodeoffset = fdt_find_node_by_path(blob, fixup_props[j].node); - if (nodeoffset >= 0) { - err = fixup_props[j].set_fn(blob, nodeoffset, - fixup_props[j].prop, bd); - if (err < 0) - debug("Problem setting %s = %s: %s\n", - fixup_props[j].node, fixup_props[j].prop, - fdt_strerror(err)); - } else { - debug("Couldn't find %s: %s\n", - fixup_props[j].node, fdt_strerror(nodeoffset)); - } - } - - /* update, or add and update /memory node */ - nodeoffset = fdt_find_node_by_path(blob, "/memory"); - if (nodeoffset < 0) { - nodeoffset = fdt_add_subnode(blob, 0, "memory"); - if (nodeoffset < 0) - debug("failed to add /memory node: %s\n", - fdt_strerror(nodeoffset)); - } - if (nodeoffset >= 0) { - fdt_setprop(blob, nodeoffset, "device_type", - "memory", sizeof("memory")); - tmp[0] = cpu_to_be32(bd->bi_memstart); - tmp[1] = cpu_to_be32(bd->bi_memsize); - fdt_setprop(blob, nodeoffset, "reg", tmp, sizeof(tmp)); - } -} -#elif defined(CONFIG_OF_FLAT_TREE) -void -ft_cpu_setup(void *blob, bd_t *bd) -{ - u32 *p; - int len; - ulong clock; - - clock = bd->bi_busfreq; - p = ft_get_prop(blob, "/cpus/" OF_CPU "/bus-frequency", &len); - if (p != NULL) - *p = cpu_to_be32(clock); - - p = ft_get_prop(blob, "/" OF_SOC "/bus-frequency", &len); - if (p != NULL) - *p = cpu_to_be32(clock); - - p = ft_get_prop(blob, "/" OF_SOC "/serial@4500/clock-frequency", &len); - if (p != NULL) - *p = cpu_to_be32(clock); - - p = ft_get_prop(blob, "/" OF_SOC "/serial@4600/clock-frequency", &len); - if (p != NULL) - *p = cpu_to_be32(clock); - -#ifdef CONFIG_TSEC1 - p = ft_get_prop(blob, "/" OF_SOC "/ethernet@24000/mac-address", &len); - if (p != NULL) - memcpy(p, bd->bi_enetaddr, 6); - - p = ft_get_prop(blob, "/" OF_SOC "/ethernet@24000/local-mac-address", &len); - if (p != NULL) - memcpy(p, bd->bi_enetaddr, 6); -#endif - -#ifdef CONFIG_TSEC2 - p = ft_get_prop(blob, "/" OF_SOC "/ethernet@25000/mac-address", &len); - if (p != NULL) - memcpy(p, bd->bi_enet1addr, 6); - - p = ft_get_prop(blob, "/" OF_SOC "/ethernet@25000/local-mac-address", &len); - if (p != NULL) - memcpy(p, bd->bi_enet1addr, 6); -#endif - -#ifdef CONFIG_UEC_ETH1 -#if CFG_UEC1_UCC_NUM == 0 /* UCC1 */ - p = ft_get_prop(blob, "/" OF_QE "/ucc@2000/mac-address", &len); - if (p != NULL) - memcpy(p, bd->bi_enetaddr, 6); - - p = ft_get_prop(blob, "/" OF_QE "/ucc@2000/local-mac-address", &len); - if (p != NULL) - memcpy(p, bd->bi_enetaddr, 6); -#elif CFG_UEC1_UCC_NUM == 2 /* UCC3 */ - p = ft_get_prop(blob, "/" OF_QE "/ucc@2200/mac-address", &len); - if (p != NULL) - memcpy(p, bd->bi_enetaddr, 6); - - p = ft_get_prop(blob, "/" OF_QE "/ucc@2200/local-mac-address", &len); - if (p != NULL) - memcpy(p, bd->bi_enetaddr, 6); -#endif -#endif - -#ifdef CONFIG_UEC_ETH2 -#if CFG_UEC2_UCC_NUM == 1 /* UCC2 */ - p = ft_get_prop(blob, "/" OF_QE "/ucc@3000/mac-address", &len); - if (p != NULL) - memcpy(p, bd->bi_enet1addr, 6); - - p = ft_get_prop(blob, "/" OF_QE "/ucc@3000/local-mac-address", &len); - if (p != NULL) - memcpy(p, bd->bi_enet1addr, 6); -#elif CFG_UEC2_UCC_NUM == 3 /* UCC4 */ - p = ft_get_prop(blob, "/" OF_QE "/ucc@3200/mac-address", &len); - if (p != NULL) - memcpy(p, bd->bi_enet1addr, 6); - - p = ft_get_prop(blob, "/" OF_QE "/ucc@3200/local-mac-address", &len); - if (p != NULL) - memcpy(p, bd->bi_enet1addr, 6); -#endif -#endif -} -#endif - #if defined(CONFIG_DDR_ECC) void dma_init(void) { diff --git a/cpu/mpc83xx/cpu_init.c b/cpu/mpc83xx/cpu_init.c index 7224979..2b92be0 100644 --- a/cpu/mpc83xx/cpu_init.c +++ b/cpu/mpc83xx/cpu_init.c @@ -1,5 +1,5 @@ /* - * Copyright (C) 2004-2006 Freescale Semiconductor, Inc. + * Copyright (C) 2004-2007 Freescale Semiconductor, Inc. * * See file CREDITS for list of people who contributed to this * project. @@ -155,6 +155,10 @@ void cpu_init_f (volatile immap_t * im) #ifdef CFG_DDRCDR im->sysconf.ddrcdr = CFG_DDRCDR; #endif + /* Output buffer impedance register */ +#ifdef CFG_OBIR + im->sysconf.obir = CFG_OBIR; +#endif #ifdef CONFIG_QE /* Config QE ioports */ diff --git a/cpu/mpc83xx/fdt.c b/cpu/mpc83xx/fdt.c new file mode 100644 index 0000000..f21c54e --- /dev/null +++ b/cpu/mpc83xx/fdt.c @@ -0,0 +1,72 @@ +/* + * Copyright 2007 Freescale Semiconductor, Inc. + * + * (C) Copyright 2000 + * Wolfgang Denk, DENX Software Engineering, wd@denx.de. + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#include <common.h> + +#if defined(CONFIG_OF_LIBFDT) + +#include <libfdt.h> +#include <fdt_support.h> + +DECLARE_GLOBAL_DATA_PTR; + +void ft_cpu_setup(void *blob, bd_t *bd) +{ +#if defined(CONFIG_HAS_ETH0) || defined(CONFIG_HAS_ETH1) ||\ + defined(CONFIG_HAS_ETH2) || defined(CONFIG_HAS_ETH3) + fdt_fixup_ethernet(blob, bd); +#endif + + do_fixup_by_prop_u32(blob, "device_type", "cpu", 4, + "timebase-frequency", (bd->bi_busfreq / 4), 1); + do_fixup_by_prop_u32(blob, "device_type", "cpu", 4, + "bus-frequency", bd->bi_busfreq, 1); + do_fixup_by_prop_u32(blob, "device_type", "cpu", 4, + "clock-frequency", gd->core_clk, 1); + do_fixup_by_prop_u32(blob, "device_type", "soc", 4, + "bus-frequency", bd->bi_busfreq, 1); +#ifdef CONFIG_QE + do_fixup_by_prop_u32(blob, "device_type", "qe", 4, + "bus-frequency", gd->qe_clk, 1); + do_fixup_by_prop_u32(blob, "device_type", "qe", 4, + "brg-frequency", gd->brg_clk, 1); +#endif + +#ifdef CFG_NS16550 + do_fixup_by_compat_u32(blob, "ns16550", + "clock-frequency", bd->bi_busfreq, 1); +#endif + +#ifdef CONFIG_CPM2 + do_fixup_by_compat_u32(blob, "fsl,cpm2-scc-uart", + "current-speed", bd->bi_baudrate, 1); + + do_fixup_by_compat_u32(blob, "fsl,cpm2-brg", + "clock-frequency", bd->bi_brgfreq, 1); +#endif + + fdt_fixup_memory(blob, (u64)bd->bi_memstart, (u64)bd->bi_memsize); +} +#endif /* CONFIG_OF_LIBFDT */ diff --git a/cpu/mpc83xx/pci.c b/cpu/mpc83xx/pci.c index 5675afe..18558db 100644 --- a/cpu/mpc83xx/pci.c +++ b/cpu/mpc83xx/pci.c @@ -28,8 +28,7 @@ #if defined(CONFIG_OF_LIBFDT) #include <libfdt.h> -#elif defined(CONFIG_OF_FLAT_TREE) -#include <ft_build.h> +#include <fdt_support.h> #endif #include <asm/mpc8349_pci.h> @@ -173,63 +172,41 @@ void mpc83xx_pci_init(int num_buses, struct pci_region **reg, int warmboot) void ft_pci_setup(void *blob, bd_t *bd) { int nodeoffset; - int err; int tmp[2]; + const char *path; if (pci_num_buses < 1) return; - nodeoffset = fdt_find_node_by_path(blob, "/" OF_SOC "/pci@8500"); + nodeoffset = fdt_path_offset(blob, "/aliases"); if (nodeoffset >= 0) { - tmp[0] = cpu_to_be32(pci_hose[0].first_busno); - tmp[1] = cpu_to_be32(pci_hose[0].last_busno); - err = fdt_setprop(blob, nodeoffset, "bus-range", - tmp, sizeof(tmp)); - - tmp[0] = cpu_to_be32(gd->pci_clk); - err = fdt_setprop(blob, nodeoffset, "clock-frequency", - tmp, sizeof(tmp[0])); - } - - if (pci_num_buses < 2) - return; - - nodeoffset = fdt_find_node_by_path(blob, "/" OF_SOC "/pci@8600"); - if (nodeoffset >= 0) { - tmp[0] = cpu_to_be32(pci_hose[0].first_busno); - tmp[1] = cpu_to_be32(pci_hose[0].last_busno); - err = fdt_setprop(blob, nodeoffset, "bus-range", - tmp, sizeof(tmp)); - - tmp[0] = cpu_to_be32(gd->pci_clk); - err = fdt_setprop(blob, nodeoffset, "clock-frequency", - tmp, sizeof(tmp[0])); - } -} -#elif CONFIG_OF_FLAT_TREE -void ft_pci_setup(void *blob, bd_t *bd) -{ - u32 *p; - int len; - - if (pci_num_buses < 1) - return; - - p = (u32 *)ft_get_prop(blob, "/" OF_SOC "/pci@8500/bus-range", &len); - if (p) { - p[0] = pci_hose[0].first_busno; - p[1] = pci_hose[0].last_busno; - } - - if (pci_num_buses < 2) - return; - - p = (u32 *)ft_get_prop(blob, "/" OF_SOC "/pci@8600/bus-range", &len); - if (p) { - p[0] = pci_hose[1].first_busno; - p[1] = pci_hose[1].last_busno; + path = fdt_getprop(blob, nodeoffset, "pci0", NULL); + if (path) { + tmp[0] = cpu_to_be32(pci_hose[0].first_busno); + tmp[1] = cpu_to_be32(pci_hose[0].last_busno); + do_fixup_by_path(blob, path, "bus-range", + &tmp, sizeof(tmp), 1); + + tmp[0] = cpu_to_be32(gd->pci_clk); + do_fixup_by_path(blob, path, "clock-frequency", + &tmp, sizeof(tmp[0]), 1); + } + + if (pci_num_buses < 2) + return; + + path = fdt_getprop(blob, nodeoffset, "pci1", NULL); + if (path) { + tmp[0] = cpu_to_be32(pci_hose[0].first_busno); + tmp[1] = cpu_to_be32(pci_hose[0].last_busno); + do_fixup_by_path(blob, path, "bus-range", + &tmp, sizeof(tmp), 1); + + tmp[0] = cpu_to_be32(gd->pci_clk); + do_fixup_by_path(blob, path, "clock-frequency", + &tmp, sizeof(tmp[0]), 1); + } } } -#endif /* CONFIG_OF_FLAT_TREE */ - +#endif /* CONFIG_OF_LIBFDT */ #endif /* CONFIG_83XX_GENERIC_PCI */ diff --git a/cpu/mpc83xx/spd_sdram.c b/cpu/mpc83xx/spd_sdram.c index ee2d038..29dd470 100644 --- a/cpu/mpc83xx/spd_sdram.c +++ b/cpu/mpc83xx/spd_sdram.c @@ -1,5 +1,5 @@ /* - * (C) Copyright 2006 Freescale Semiconductor, Inc. + * (C) Copyright 2006-2007 Freescale Semiconductor, Inc. * * (C) Copyright 2006 * Wolfgang Denk, DENX Software Engineering, wd@denx.de. @@ -198,6 +198,7 @@ long int spd_sdram() if(spd.mem_type == SPD_MEMTYPE_DDR2) { immap->sysconf.ddrcdr = CFG_DDRCDR_VALUE; } + udelay(50000); #endif /* @@ -576,7 +577,7 @@ long int spd_sdram() if (effective_data_rate == 266 || effective_data_rate == 333) { cpo = 0x7; /* READ_LAT + 5/4 */ } else if (effective_data_rate == 400) { - cpo = 0x9; /* READ_LAT + 7/4 */ + cpo = 0x7; /* READ_LAT + 5/4 */ } else { /* Automatic calibration */ cpo = 0x1f; @@ -705,9 +706,11 @@ long int spd_sdram() * SDRAM Cfg 2 */ odt_cfg = 0; +#ifndef CONFIG_NEVER_ASSERT_ODT_TO_CPU if (odt_rd_cfg | odt_wr_cfg) { odt_cfg = 0x2; /* ODT to IOs during reads */ } +#endif if (spd.mem_type == SPD_MEMTYPE_DDR2) { ddr->sdram_cfg2 = (0 | (0 << 26) /* True DQS */ diff --git a/cpu/mpc83xx/speed.c b/cpu/mpc83xx/speed.c index cba57fa..4f5a866 100644 --- a/cpu/mpc83xx/speed.c +++ b/cpu/mpc83xx/speed.c @@ -2,7 +2,7 @@ * (C) Copyright 2000-2002 * Wolfgang Denk, DENX Software Engineering, wd@denx.de. * - * Copyright (C) 2004-2006 Freescale Semiconductor, Inc. + * Copyright (C) 2004-2007 Freescale Semiconductor, Inc. * * See file CREDITS for list of people who contributed to this * project. @@ -100,7 +100,7 @@ int get_clocks(void) u32 lcrr; u32 csb_clk; -#if defined(CONFIG_MPC834X) || defined(CONFIG_MPC831X) +#if defined(CONFIG_MPC834X) || defined(CONFIG_MPC831X) || defined(CONFIG_MPC837X) u32 tsec1_clk; u32 tsec2_clk; u32 usbdr_clk; @@ -113,6 +113,12 @@ int get_clocks(void) #if !defined(CONFIG_MPC832X) u32 i2c2_clk; #endif +#if defined(CONFIG_MPC8315) + u32 tdm_clk; +#endif +#if defined(CONFIG_MPC837X) + u32 sdhc_clk; +#endif u32 enc_clk; u32 lbiu_clk; u32 lclk_clk; @@ -126,6 +132,13 @@ int get_clocks(void) u32 qe_clk; u32 brg_clk; #endif +#if defined(CONFIG_MPC837X) + u32 pciexp1_clk; + u32 pciexp2_clk; +#endif +#if defined(CONFIG_MPC837X) || defined(CONFIG_MPC8315) + u32 sata_clk; +#endif if ((im->sysconf.immrbar & IMMRBAR_BASE_ADDR) != (u32) im) return -1; @@ -151,7 +164,7 @@ int get_clocks(void) sccr = im->clk.sccr; -#if defined(CONFIG_MPC834X) || defined(CONFIG_MPC831X) +#if defined(CONFIG_MPC834X) || defined(CONFIG_MPC831X) || defined(CONFIG_MPC837X) switch ((sccr & SCCR_TSEC1CM) >> SCCR_TSEC1CM_SHIFT) { case 0: tsec1_clk = 0; @@ -167,7 +180,7 @@ int get_clocks(void) break; default: /* unkown SCCR_TSEC1CM value */ - return -4; + return -2; } switch ((sccr & SCCR_USBDRCM) >> SCCR_USBDRCM_SHIFT) { @@ -185,11 +198,11 @@ int get_clocks(void) break; default: /* unkown SCCR_USBDRCM value */ - return -8; + return -3; } #endif -#if defined(CONFIG_MPC834X) +#if defined(CONFIG_MPC834X) || defined(CONFIG_MPC837X) || defined(CONFIG_MPC8315) switch ((sccr & SCCR_TSEC2CM) >> SCCR_TSEC2CM_SHIFT) { case 0: tsec2_clk = 0; @@ -205,11 +218,18 @@ int get_clocks(void) break; default: /* unkown SCCR_TSEC2CM value */ - return -5; + return -4; } +#elif defined(CONFIG_MPC8313) + tsec2_clk = tsec1_clk; - i2c1_clk = tsec2_clk; + if (!(sccr & SCCR_TSEC1ON)) + tsec1_clk = 0; + if (!(sccr & SCCR_TSEC2ON)) + tsec2_clk = 0; +#endif +#if defined(CONFIG_MPC834X) switch ((sccr & SCCR_USBMPHCM) >> SCCR_USBMPHCM_SHIFT) { case 0: usbmph_clk = 0; @@ -225,7 +245,7 @@ int get_clocks(void) break; default: /* unkown SCCR_USBMPHCM value */ - return -7; + return -5; } if (usbmph_clk != 0 && usbdr_clk != 0 && usbmph_clk != usbdr_clk) { @@ -233,41 +253,138 @@ int get_clocks(void) * USB DR clock is not disabled then * USB MPH & USB DR must have the same rate */ - return -9; + return -6; + } +#endif + switch ((sccr & SCCR_ENCCM) >> SCCR_ENCCM_SHIFT) { + case 0: + enc_clk = 0; + break; + case 1: + enc_clk = csb_clk; + break; + case 2: + enc_clk = csb_clk / 2; + break; + case 3: + enc_clk = csb_clk / 3; + break; + default: + /* unkown SCCR_ENCCM value */ + return -7; } -#elif defined(CONFIG_MPC831X) - tsec2_clk = tsec1_clk; - if (!(sccr & SCCR_TSEC1ON)) - tsec1_clk = 0; - if (!(sccr & SCCR_TSEC2ON)) - tsec2_clk = 0; +#if defined(CONFIG_MPC837X) + switch ((sccr & SCCR_SDHCCM) >> SCCR_SDHCCM_SHIFT) { + case 0: + sdhc_clk = 0; + break; + case 1: + sdhc_clk = csb_clk; + break; + case 2: + sdhc_clk = csb_clk / 2; + break; + case 3: + sdhc_clk = csb_clk / 3; + break; + default: + /* unkown SCCR_SDHCCM value */ + return -8; + } +#endif +#if defined(CONFIG_MPC8315) + switch ((sccr & SCCR_TDMCM) >> SCCR_TDMCM_SHIFT) { + case 0: + tdm_clk = 0; + break; + case 1: + tdm_clk = csb_clk; + break; + case 2: + tdm_clk = csb_clk / 2; + break; + case 3: + tdm_clk = csb_clk / 3; + break; + default: + /* unkown SCCR_TDMCM value */ + return -8; + } #endif -#if !defined(CONFIG_MPC834X) +#if defined(CONFIG_MPC834X) + i2c1_clk = tsec2_clk; +#elif defined(CONFIG_MPC8360) i2c1_clk = csb_clk; +#elif defined(CONFIG_MPC832X) + i2c1_clk = enc_clk; +#elif defined(CONFIG_MPC831X) + i2c1_clk = enc_clk; +#elif defined(CONFIG_MPC837X) + i2c1_clk = sdhc_clk; #endif #if !defined(CONFIG_MPC832X) - i2c2_clk = csb_clk; /* i2c-2 clk is equal to csb clk */ + i2c2_clk = csb_clk; /* i2c-2 clk is equal to csb clk */ #endif - switch ((sccr & SCCR_ENCCM) >> SCCR_ENCCM_SHIFT) { +#if defined(CONFIG_MPC837X) + switch ((sccr & SCCR_PCIEXP1CM) >> SCCR_PCIEXP1CM_SHIFT) { case 0: - enc_clk = 0; + pciexp1_clk = 0; break; case 1: - enc_clk = csb_clk; + pciexp1_clk = csb_clk; break; case 2: - enc_clk = csb_clk / 2; + pciexp1_clk = csb_clk / 2; break; case 3: - enc_clk = csb_clk / 3; + pciexp1_clk = csb_clk / 3; break; default: - /* unkown SCCR_ENCCM value */ - return -6; + /* unkown SCCR_PCIEXP1CM value */ + return -9; + } + + switch ((sccr & SCCR_PCIEXP2CM) >> SCCR_PCIEXP2CM_SHIFT) { + case 0: + pciexp2_clk = 0; + break; + case 1: + pciexp2_clk = csb_clk; + break; + case 2: + pciexp2_clk = csb_clk / 2; + break; + case 3: + pciexp2_clk = csb_clk / 3; + break; + default: + /* unkown SCCR_PCIEXP2CM value */ + return -10; } +#endif + +#if defined(CONFIG_MPC837X) || defined(CONFIG_MPC8315) + switch ((sccr & SCCR_SATA1CM) >> SCCR_SATA1CM_SHIFT) { + case 0: + sata_clk = 0; + break; + case 1: + sata_clk = csb_clk; + break; + case 2: + sata_clk = csb_clk / 2; + break; + case 3: + sata_clk = csb_clk / 3; + break; + default: + /* unkown SCCR_SATA1CM value */ + return -11; + } +#endif lbiu_clk = csb_clk * (1 + ((im->reset.rcwl & HRCWL_LBIUCM) >> HRCWL_LBIUCM_SHIFT)); @@ -280,7 +397,7 @@ int get_clocks(void) break; default: /* unknown lcrr */ - return -10; + return -12; } ddr_clk = csb_clk * @@ -316,7 +433,7 @@ int get_clocks(void) break; default: /* unkown core to csb ratio */ - return -12; + return -13; } #if defined(CONFIG_MPC8360) || defined(CONFIG_MPC832X) @@ -327,7 +444,7 @@ int get_clocks(void) #endif gd->csb_clk = csb_clk; -#if defined(CONFIG_MPC834X) || defined(CONFIG_MPC831X) +#if defined(CONFIG_MPC834X) || defined(CONFIG_MPC831X) || defined(CONFIG_MPC837X) gd->tsec1_clk = tsec1_clk; gd->tsec2_clk = tsec2_clk; gd->usbdr_clk = usbdr_clk; @@ -335,6 +452,12 @@ int get_clocks(void) #if defined(CONFIG_MPC834X) gd->usbmph_clk = usbmph_clk; #endif +#if defined(CONFIG_MPC8315) + gd->tdm_clk = tdm_clk; +#endif +#if defined(CONFIG_MPC837X) + gd->sdhc_clk = sdhc_clk; +#endif gd->core_clk = core_clk; gd->i2c1_clk = i2c1_clk; #if !defined(CONFIG_MPC832X) @@ -351,6 +474,13 @@ int get_clocks(void) gd->qe_clk = qe_clk; gd->brg_clk = brg_clk; #endif +#if defined(CONFIG_MPC837X) + gd->pciexp1_clk = pciexp1_clk; + gd->pciexp2_clk = pciexp2_clk; +#endif +#if defined(CONFIG_MPC837X) || defined(CONFIG_MPC8315) + gd->sata_clk = sata_clk; +#endif gd->pci_clk = pci_sync_in; gd->cpu_clk = gd->core_clk; gd->bus_clk = gd->csb_clk; @@ -387,7 +517,13 @@ int do_clocks (cmd_tbl_t * cmdtp, int flag, int argc, char *argv[]) #if !defined(CONFIG_MPC832X) printf(" I2C2: %4d MHz\n", gd->i2c2_clk / 1000000); #endif -#if defined(CONFIG_MPC834X) || defined(CONFIG_MPC831X) +#if defined(CONFIG_MPC8315) + printf(" TDM: %4d MHz\n", gd->tdm_clk / 1000000); +#endif +#if defined(CONFIG_MPC837X) + printf(" SDHC: %4d MHz\n", gd->sdhc_clk / 1000000); +#endif +#if defined(CONFIG_MPC834X) || defined(CONFIG_MPC831X) || defined(CONFIG_MPC837X) printf(" TSEC1: %4d MHz\n", gd->tsec1_clk / 1000000); printf(" TSEC2: %4d MHz\n", gd->tsec2_clk / 1000000); printf(" USB DR: %4d MHz\n", gd->usbdr_clk / 1000000); @@ -395,6 +531,13 @@ int do_clocks (cmd_tbl_t * cmdtp, int flag, int argc, char *argv[]) #if defined(CONFIG_MPC834X) printf(" USB MPH: %4d MHz\n", gd->usbmph_clk / 1000000); #endif +#if defined(CONFIG_MPC837X) + printf(" PCIEXP1: %4d MHz\n", gd->pciexp1_clk / 1000000); + printf(" PCIEXP2: %4d MHz\n", gd->pciexp2_clk / 1000000); +#endif +#if defined(CONFIG_MPC837X) || defined(CONFIG_MPC8315) + printf(" SATA: %4d MHz\n", gd->sata_clk / 1000000); +#endif return 0; } diff --git a/cpu/mpc83xx/u-boot.lds b/cpu/mpc83xx/u-boot.lds index ca663bc..937c87a 100644 --- a/cpu/mpc83xx/u-boot.lds +++ b/cpu/mpc83xx/u-boot.lds @@ -52,6 +52,7 @@ SECTIONS { cpu/mpc83xx/start.o (.text) *(.text) + *(.fixup) *(.got1) . = ALIGN(16); *(.rodata) |