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authorKim Phillips <kim.phillips@freescale.com>2007-04-30 15:26:21 -0500
committerKim Phillips <kim.phillips@freescale.com>2007-05-01 12:08:36 -0500
commit54b2d434ae9d01787936f34fe1759cf3d7624ae3 (patch)
treee70026ee0436509f2723e166e016d5f837a89d96 /cpu/mpc83xx
parent5c5d3242935cf3543af01142627494434834cf98 (diff)
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mpc83xx: replace elaborate boottime verbosity with 'clocks' command
and fix CPU: to align with Board: display text. Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
Diffstat (limited to 'cpu/mpc83xx')
-rw-r--r--cpu/mpc83xx/cpu.c8
-rw-r--r--cpu/mpc83xx/speed.c10
2 files changed, 13 insertions, 5 deletions
diff --git a/cpu/mpc83xx/cpu.c b/cpu/mpc83xx/cpu.c
index 332afaa..e078f27 100644
--- a/cpu/mpc83xx/cpu.c
+++ b/cpu/mpc83xx/cpu.c
@@ -52,7 +52,7 @@ int checkcpu(void)
immr = (immap_t *)CFG_IMMR;
- puts("CPU: ");
+ puts("CPU: ");
switch (pvr & 0xffff0000) {
case PVR_E300C1:
@@ -158,10 +158,12 @@ int checkcpu(void)
/* Multiple revisons of 834x processors may have the same SPRIDR value.
* So use PVR to identify the revision number.
*/
- printf("Rev: %02x at %s MHz\n", PVR_MAJ(pvr)<<4 | PVR_MIN(pvr), strmhz(buf, clock));
+ printf("Rev: %02x at %s MHz", PVR_MAJ(pvr)<<4 | PVR_MIN(pvr), strmhz(buf, clock));
#else
- printf("Rev: %02x at %s MHz\n", spridr & 0x0000FFFF, strmhz(buf, clock));
+ printf("Rev: %02x at %s MHz", spridr & 0x0000FFFF, strmhz(buf, clock));
#endif
+ printf(", CSB: %4d MHz\n", gd->csb_clk / 1000000);
+
return 0;
}
diff --git a/cpu/mpc83xx/speed.c b/cpu/mpc83xx/speed.c
index 1a44031..bf30616 100644
--- a/cpu/mpc83xx/speed.c
+++ b/cpu/mpc83xx/speed.c
@@ -25,6 +25,7 @@
#include <common.h>
#include <mpc83xx.h>
+#include <command.h>
#include <asm/processor.h>
DECLARE_GLOBAL_DATA_PTR;
@@ -365,11 +366,11 @@ ulong get_bus_freq(ulong dummy)
return gd->csb_clk;
}
-int print_clock_conf(void)
+int do_clocks (cmd_tbl_t * cmdtp, int flag, int argc, char *argv[])
{
printf("Clock configuration:\n");
- printf(" Coherent System Bus: %4d MHz\n", gd->csb_clk / 1000000);
printf(" Core: %4d MHz\n", gd->core_clk / 1000000);
+ printf(" Coherent System Bus: %4d MHz\n", gd->csb_clk / 1000000);
#if defined(CONFIG_MPC8360) || defined(CONFIG_MPC832X)
printf(" QE: %4d MHz\n", gd->qe_clk / 1000000);
printf(" BRG: %4d MHz\n", gd->brg_clk / 1000000);
@@ -395,3 +396,8 @@ int print_clock_conf(void)
#endif
return 0;
}
+
+U_BOOT_CMD(clocks, 1, 0, do_clocks,
+ "clocks - print clock configuration\n",
+ " clocks\n"
+);