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authorTimur Tabi <timur@freescale.com>2006-10-31 18:44:42 -0600
committerKim Phillips <kim.phillips@freescale.com>2006-11-03 19:42:20 -0600
commit2ad6b513b31070bd0c003792ed1c3e7f5d740357 (patch)
treee4d9493e7f6cdc1086a90db4c64bbd265a1acaa6 /cpu/mpc83xx/spd_sdram.c
parent183da6d9b446cc12123455844ad1187e2375626f (diff)
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mpc83xx: Add support for the MPC8349E-mITX
PREREQUISITE PATCHES: * This patch can only be applied after the following patches have been applied: 1) DNX#2006090742000024 "Add support for multiple I2C buses" 2) DNX#2006090742000033 "Multi-bus I2C implementation of MPC834x" 3) DNX#2006091242000041 "Additional MPC8349 support for multibus i2c" 4) DNX#2006091242000078 "Add support for variable flash memory sizes on 83xx systems" 5) DNX#2006091242000069 "Add support for Errata DDR6 on MPC 834x systems" CHANGELOG: * Add support for the Freescale MPC8349E-mITX reference design platform. The second TSEC (Vitesse 7385 switch) is not supported at this time. Signed-off-by: Timur Tabi <timur@freescale.com>
Diffstat (limited to 'cpu/mpc83xx/spd_sdram.c')
-rw-r--r--cpu/mpc83xx/spd_sdram.c21
1 files changed, 21 insertions, 0 deletions
diff --git a/cpu/mpc83xx/spd_sdram.c b/cpu/mpc83xx/spd_sdram.c
index 8ee4234..3dfde8a 100644
--- a/cpu/mpc83xx/spd_sdram.c
+++ b/cpu/mpc83xx/spd_sdram.c
@@ -133,6 +133,26 @@ long int spd_sdram()
/* Read SPD parameters with I2C */
+#ifdef CFG_83XX_DDR_USES_CS0
+ ddr->csbnds[0].csbnds = (banksize(spd.row_dens) >> 24) - 1;
+ ddr->cs_config[0] = ( 1 << 31
+ | (spd.nrow_addr - 12) << 8
+ | (spd.ncol_addr - 8) );
+ debug("\n");
+ debug("cs0_bnds = 0x%08x\n",ddr->csbnds[0].csbnds);
+ debug("cs0_config = 0x%08x\n",ddr->cs_config[0]);
+
+ if (spd.nrows == 2) {
+ ddr->csbnds[1].csbnds = ( (banksize(spd.row_dens) >> 8)
+ | ((banksize(spd.row_dens) >> 23) - 1) );
+ ddr->cs_config[1] = ( 1<<31
+ | (spd.nrow_addr-12) << 8
+ | (spd.ncol_addr-8) );
+ debug("cs1_bnds = 0x%08x\n",ddr->csbnds[1].csbnds);
+ debug("cs1_config = 0x%08x\n",ddr->cs_config[1]);
+ }
+
+#else
CFG_READ_SPD(SPD_EEPROM_ADDRESS, 0, 1, (uchar *) & spd, sizeof (spd));
#ifdef SPD_DEBUG
spd_debug(&spd);
@@ -180,6 +200,7 @@ long int spd_sdram()
debug("cs3_bnds = 0x%08x\n",ddr->csbnds[3].csbnds);
debug("cs3_config = 0x%08x\n",ddr->cs_config[3]);
}
+#endif
if (spd.mem_type != 0x07) {
puts("No DDR module found!\n");