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author | Kim Phillips <kim.phillips@freescale.com> | 2007-08-17 09:30:00 -0500 |
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committer | Kim Phillips <kim.phillips@freescale.com> | 2007-08-17 09:30:00 -0500 |
commit | 4cc1cd5941827a04cf5c51a07fcc42e8945894aa (patch) | |
tree | d383de84bb7f7b36c096789719c2ccf6d879ab37 /cpu/mpc83xx/spd_sdram.c | |
parent | e58fe95784d2514fc9c21028dc59f2b319a35d80 (diff) | |
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mpc83xx: fix typo in DDR2 programming
introduced in the implement board_add_ram_info patch as I was cleaning out the
magic numbers. sorry.
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
Diffstat (limited to 'cpu/mpc83xx/spd_sdram.c')
-rw-r--r-- | cpu/mpc83xx/spd_sdram.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/cpu/mpc83xx/spd_sdram.c b/cpu/mpc83xx/spd_sdram.c index 040836c..ee2d038 100644 --- a/cpu/mpc83xx/spd_sdram.c +++ b/cpu/mpc83xx/spd_sdram.c @@ -744,7 +744,7 @@ long int spd_sdram() if (spd.mem_type == SPD_MEMTYPE_DDR) sdram_type = SDRAM_CFG_SDRAM_TYPE_DDR1; else - sdram_type = SDRAM_CFG_SDRAM_TYPE_DDR1; + sdram_type = SDRAM_CFG_SDRAM_TYPE_DDR2; sdram_cfg = (0 | SDRAM_CFG_MEM_EN /* DDR enable */ |