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author | Gerald Van Baren <vanbaren@cideas.com> | 2007-08-10 19:19:50 -0400 |
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committer | Gerald Van Baren <vanbaren@cideas.com> | 2007-08-10 19:19:50 -0400 |
commit | 29eaae953476f2bba4d5c7ac097b96cd827c1dff (patch) | |
tree | 537faa4c04db58ee7b070b56bd7de7bd116092d3 /cpu/mpc83xx/spd_sdram.c | |
parent | ed8e5f362a2fc572eb9c1854f6c76c291b0f9a0f (diff) | |
parent | fb56579ffe7ef3275b7036bb7b924e5a0d32bd70 (diff) | |
download | u-boot-imx-29eaae953476f2bba4d5c7ac097b96cd827c1dff.zip u-boot-imx-29eaae953476f2bba4d5c7ac097b96cd827c1dff.tar.gz u-boot-imx-29eaae953476f2bba4d5c7ac097b96cd827c1dff.tar.bz2 |
Merge git://www.denx.de/git/u-boot
Diffstat (limited to 'cpu/mpc83xx/spd_sdram.c')
-rw-r--r-- | cpu/mpc83xx/spd_sdram.c | 13 |
1 files changed, 10 insertions, 3 deletions
diff --git a/cpu/mpc83xx/spd_sdram.c b/cpu/mpc83xx/spd_sdram.c index 647813f..54f0c83 100644 --- a/cpu/mpc83xx/spd_sdram.c +++ b/cpu/mpc83xx/spd_sdram.c @@ -574,7 +574,10 @@ long int spd_sdram() /* Check DIMM data bus width */ if (spd.dataw_lsb == 0x20) { - burstlen = 0x03; /* 32 bit data bus, burst len is 8 */ + if (spd.mem_type == SPD_MEMTYPE_DDR) + burstlen = 0x03; /* 32 bit data bus, burst len is 8 */ + else + burstlen = 0x02; /* 32 bit data bus, burst len is 4 */ printf("\n DDR DIMM: data bus width is 32 bit"); } else { burstlen = 0x02; /* Others act as 64 bit bus, burst len is 4 */ @@ -730,8 +733,12 @@ long int spd_sdram() sdram_cfg |= 0x10000000; /* The DIMM is 32bit width */ - if (spd.dataw_lsb == 0x20) - sdram_cfg |= 0x000C0000; + if (spd.dataw_lsb == 0x20) { + if (spd.mem_type == SPD_MEMTYPE_DDR) + sdram_cfg |= 0x000C0000; + if (spd.mem_type == SPD_MEMTYPE_DDR2) + sdram_cfg |= 0x00080000; + } ddrc_ecc_enable = 0; |