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author | Marian Balakowicz <m8@semihalf.com> | 2006-03-14 16:12:48 +0100 |
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committer | Marian Balakowicz <m8@semihalf.com> | 2006-03-14 16:12:48 +0100 |
commit | 6d8ae5abb5311bd8e306a5a060dcfbeb0874a169 (patch) | |
tree | 2eab4767461b8142b7cc24a96bb468dc07b8d8b5 /cpu/mpc83xx/cpu.c | |
parent | e24e0f0744f4d28d7642c88052b712e91dbbf203 (diff) | |
download | u-boot-imx-6d8ae5abb5311bd8e306a5a060dcfbeb0874a169.zip u-boot-imx-6d8ae5abb5311bd8e306a5a060dcfbeb0874a169.tar.gz u-boot-imx-6d8ae5abb5311bd8e306a5a060dcfbeb0874a169.tar.bz2 |
Add sync in do_reset() routine for MPC83xx after RPR register
was written to. It is need on some targets when BAT translation
is enabled.
Diffstat (limited to 'cpu/mpc83xx/cpu.c')
-rw-r--r-- | cpu/mpc83xx/cpu.c | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/cpu/mpc83xx/cpu.c b/cpu/mpc83xx/cpu.c index e49e4fe..63f8242 100644 --- a/cpu/mpc83xx/cpu.c +++ b/cpu/mpc83xx/cpu.c @@ -93,6 +93,8 @@ do_reset (cmd_tbl_t * cmdtp, int flag, int argc, char *argv[]) /* enable Reset Control Reg */ immap->reset.rpr = 0x52535445; + __asm__ __volatile__ ("sync"); + __asm__ __volatile__ ("isync"); /* confirm Reset Control Reg is enabled */ while(!((immap->reset.rcer) & RCER_CRE)); |