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authorwdenk <wdenk>2003-05-31 18:35:21 +0000
committerwdenk <wdenk>2003-05-31 18:35:21 +0000
commit7a8e9bed17d7924a9c5c4699b1f6a3a0359524ed (patch)
tree5c273df9c5efa7b1b6a4ca88904e48039ef591e8 /cpu/mpc8260
parent3b57fe0a70b903f4db66c558bb9828bc58acf06b (diff)
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* Patch by Marc Singer, 29 May 2003:
Fixed rarp boot method for IA32 and other little-endian CPUs. * Patch by Marc Singer, 28 May 2003: Added port I/O commands. * Patch by Matthew McClintock, 28 May 2003 - cpu/mpc824x/start.S: fix relocation code when booting from RAM - minor patches for utx8245 * Patch by Daniel Engström, 28 May 2003: x86 update * Patch by Dave Ellis, 9 May 2003 + 27 May 2003: add nand flash support to SXNI855T configuration fix/extend nand flash support: - fix 'nand erase' command so does not erase bad blocks - fix 'nand write' command so does not write to bad blocks - fix nand_probe() so handles no flash detected properly - add doc/README.nand - add .jffs2 and .oob options to nand read/write - add 'nand bad' command to list bad blocks - add 'clean' option to 'nand erase' to write JFFS2 clean markers - make NAND read/write faster * Patch by Rune Torgersen, 23 May 2003: Update for MPC8266ADS board
Diffstat (limited to 'cpu/mpc8260')
-rw-r--r--cpu/mpc8260/pci.c16
1 files changed, 11 insertions, 5 deletions
diff --git a/cpu/mpc8260/pci.c b/cpu/mpc8260/pci.c
index 47c5dae..6d16c04 100644
--- a/cpu/mpc8260/pci.c
+++ b/cpu/mpc8260/pci.c
@@ -353,6 +353,12 @@ void pci_mpc8250_init(struct pci_controller *hose)
pci_hose_write_config_word(hose, host_devno, PCI_COMMAND,
tempShort | PCI_COMMAND_MASTER | PCI_COMMAND_MEMORY);
+#ifdef CONFIG_MPC8266ADS
+ /* do some bridge init, should be done on all 8260 based bridges */
+ pci_hose_write_config_byte(hose, host_devno, PCI_CACHE_LINE_SIZE, 0x08);
+ pci_hose_write_config_byte(hose, host_devno, PCI_LATENCY_TIMER, 0xF8);
+#endif
+
hose->first_busno = 0;
hose->last_busno = 0xff;
@@ -373,11 +379,11 @@ void pci_mpc8250_init(struct pci_controller *hose)
/* PCI memory space */
#ifdef CONFIG_MPC8266ADS
- pci_set_region(hose->regions + 0,
- PCI_SLV_MEM_BUS,
- PCI_SLV_MEM_LOCAL,
- gd->ram_size,
- PCI_REGION_MEM | PCI_REGION_MEMORY);
+ pci_set_region(hose->regions + 1,
+ PCI_MSTR_MEMIO_BUS,
+ PCI_MSTR_MEMIO_LOCAL,
+ PCI_MSTR_MEMIO_SIZE,
+ PCI_REGION_MEM);
#else
pci_set_region(hose->regions + 1,
PCI_MSTR_MEM_BUS,