* Patches by Yuli Barcohen, 13 Jul 2003:

  - Correct flash and JFFS2 support for MPC8260ADS
  - fix PVR values and clock generation for PowerQUICC II family
    (8270/8275/8280)

* Patch by Bernhard Kuhn, 08 Jul 2003:
  - add support for M68K targets

* Patch by Ken Chou, 3 Jul:
  - Fix PCI config table for A3000
  - Fix iobase for natsemi.c
    (PCI_BASE_ADDRESS_0 is the IO base register for DP83815)

* Allow to enable "slow" POST routines by key press on power-on
* Fix temperature dependend switching of LCD backlight on LWMON
* Tweak output format for LWMON

3 files changed, 40 insertions, 14 deletions

diff --git a/cpu/mpc8260/commproc.c b/cpu/mpc8260/commproc.c
index c523ee4..72cceb3 100644
--- a/cpu/mpc8260/commproc.c
+++ b/cpu/mpc8260/commproc.c
@@ -111,9 +111,9 @@ m8260_cpm_hostalloc(uint size, uint align)
  * to port numbers).  Documentation uses 1-based numbering.
  */
 #define BRG_INT_CLK	gd->brg_clk
-#define BRG_UART_CLK	((BRG_INT_CLK + 15) / 16)
+#define BRG_UART_CLK	(BRG_INT_CLK / 16)
 
-/* This function is used by UARTS, or anything else that uses a 16x
+/* This function is used by UARTs, or anything else that uses a 16x
  * oversampled clock.
  */
 void
@@ -123,9 +123,10 @@ m8260_cpm_setbrg(uint brg, uint rate)
 
 	volatile immap_t *immr = (immap_t *)CFG_IMMR;
 	volatile uint	*bp;
+	uint cd = BRG_UART_CLK / rate;
 
-	/* This is good enough to get SMCs running.....
-	*/
+	if ((BRG_UART_CLK % rate) < (rate / 2))
+		cd--;
 	if (brg < 4) {
 		bp = (uint *)&immr->im_brgc1;
 	}
@@ -134,7 +135,7 @@ m8260_cpm_setbrg(uint brg, uint rate)
 		brg -= 4;
 	}
 	bp += brg;
-	*bp = (((((BRG_UART_CLK+rate-1)/rate)-1)&0xfff)<<1)|CPM_BRG_EN;
+	*bp = (cd << 1) | CPM_BRG_EN;
 }
 
 /* This function is used to set high speed synchronous baud rate
diff --git a/cpu/mpc8260/cpu.c b/cpu/mpc8260/cpu.c
index 7662fc6..2736702 100644
--- a/cpu/mpc8260/cpu.c
+++ b/cpu/mpc8260/cpu.c
@@ -22,7 +22,7 @@
  */
 
 /*
- * CPU specific code for the MPC8255 / MPC8260 CPUs
+ * CPU specific code for the MPC825x / MPC826x / MPC827x / MPC828x
  *
  * written or collected and sometimes rewritten by
  * Magnus Damm <damm@bitsmart.com>
@@ -35,6 +35,9 @@
  *
  * added 8260 masks by
  * Marius Groeger <mag@sysgo.de>
+ *
+ * added HiP7 (8270/8275/8280) processors support by
+ * Yuli Barcohen <yuli@arabellasw.com>
  */
 
 #include <common.h>
@@ -56,15 +59,27 @@ int checkcpu (void)
 
 	puts ("CPU:   ");
 
-	if (((pvr >> 16) & 0xff) != 0x81)
+	switch (pvr) {
+	case PVR_8260:
+	case PVR_8260_HIP3:
+		k = 3;
+		break;
+	case PVR_8260_HIP4:
+		k = 4;
+		break;
+	case PVR_8260_HIP7:
+		k = 7;
+		break;
+	default:
 		return -1;	/* whoops! not an MPC8260 */
+	}
 	rev = pvr & 0xff;
 
 	immr = immap->im_memctl.memc_immr;
 	if ((immr & IMMR_ISB_MSK) != CFG_IMMR)
 		return -1;	/* whoops! someone moved the IMMR */
 
-	printf (CPU_ID_STR " (Rev %02x, Mask ", rev);
+	printf (CPU_ID_STR " (HiP%d Rev %02x, Mask ", k, rev);
 
 	/*
 	 * the bottom 16 bits of the immr are the Part Number and Mask Number
@@ -104,6 +119,12 @@ int checkcpu (void)
 	case 0x0062:
 		printf ("B.1 4K25A");
 		break;
+	case 0x0A00:
+		printf ("0.0 0K49M");
+		break;
+	case 0x0A01:
+		printf ("0.1 1K49M");
+		break;
 	default:
 		printf ("unknown [immr=0x%04x,k=0x%04x]", m, k);
 		break;
diff --git a/cpu/mpc8260/speed.c b/cpu/mpc8260/speed.c
index 1f53c4f..6a3176a 100644
--- a/cpu/mpc8260/speed.c
+++ b/cpu/mpc8260/speed.c
@@ -120,15 +120,19 @@ int get_clocks (void)
 
 	scmr = immap->im_clkrst.car_scmr;
 	corecnf = (scmr & SCMR_CORECNF_MSK) >> SCMR_CORECNF_SHIFT;
-	busdf = (scmr & SCMR_BUSDF_MSK) >> SCMR_BUSDF_SHIFT;
-	cpmdf = (scmr & SCMR_CPMDF_MSK) >> SCMR_CPMDF_SHIFT;
-	plldf = (scmr & SCMR_PLLDF) ? 1 : 0;
-	pllmf = (scmr & SCMR_PLLMF_MSK) >> SCMR_PLLMF_SHIFT;
-
 	cp = &corecnf_tab[corecnf];
 
-	gd->vco_out = (clkin * 2 * (pllmf + 1)) / (plldf + 1);
+	busdf = (scmr & SCMR_BUSDF_MSK) >> SCMR_BUSDF_SHIFT;
+	cpmdf = (scmr & SCMR_CPMDF_MSK) >> SCMR_CPMDF_SHIFT;
 
+	if (get_pvr () == PVR_8260_HIP7) { /* HiP7 */
+		pllmf = (scmr & SCMR_PLLMF_MSKH7) >> SCMR_PLLMF_SHIFT;
+		gd->vco_out = clkin * (pllmf + 1);
+	} else {                        /* HiP3, HiP4 */
+		pllmf = (scmr & SCMR_PLLMF_MSK) >> SCMR_PLLMF_SHIFT;
+		plldf = (scmr & SCMR_PLLDF) ? 1 : 0;
+		gd->vco_out = (clkin * 2 * (pllmf + 1)) / (plldf + 1);
+	}
 #if 0
 	if (gd->vco_out / (busdf + 1) != clkin) {
 		/* aaarrrggghhh!!! */