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authorwdenk <wdenk>2004-02-22 23:46:08 +0000
committerwdenk <wdenk>2004-02-22 23:46:08 +0000
commit3c74e32a98187c792edcea3e0e39150de5a8dda6 (patch)
treefeb1a080a1332a3bfc383282ba9a6e4cfe6f8f4a /cpu/mpc8260/traps.c
parentcf56e1101957c09cb4aafcf28a89658c4649c511 (diff)
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* Patch by Travis Sawyer, 09 Feb 2004:
o 440GX: - Fix PCI Indirect access for type 1 config cycles with ppc440. - Add phymode for 440 enet - fix pci pre init o XPedite1K: - Change board_pre_init to board_early_init_f - Add user flash to bus controller setup - Fix pci pre init - Fix is_pci_host to check GPIO for monarch bit - Force xpedite1k to pci conventional mode (via #define option) * Patch by Brad Kemp, 4 Feb 2004: - handle the machine check that is generated during the PCI scans on 82xx processors. - define the registers used in the IMMR by the PCI subsystem. * Patch by Pierre Aubert, 03 Feb 2004: cpu/mpc5xxx/start.S: copy MBAR into SPR311 * Patch by Jeff Angielski, 03 Feb 2004: Fix copy & paste error in cpu/mpc8260/pci.c * Patch by Reinhard Meyer, 24 Jan 2004: Fix typo in cpu/mpc5xxx/pci_mpc5200.c
Diffstat (limited to 'cpu/mpc8260/traps.c')
-rw-r--r--cpu/mpc8260/traps.c42
1 files changed, 36 insertions, 6 deletions
diff --git a/cpu/mpc8260/traps.c b/cpu/mpc8260/traps.c
index a7f6f7e..deab808 100644
--- a/cpu/mpc8260/traps.c
+++ b/cpu/mpc8260/traps.c
@@ -35,6 +35,7 @@
#include <common.h>
#include <command.h>
#include <asm/processor.h>
+#include <asm/m8260_pci.h>
#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
int (*debugger_exception_handler)(struct pt_regs *) = 0;
@@ -86,14 +87,12 @@ void show_regs(struct pt_regs * regs)
printf("\n");
for (i = 0; i < 32; i++) {
- if ((i % 8) == 0)
- {
+ if ((i % 8) == 0) {
printf("GPR%02d: ", i);
}
printf("%08lX ", regs->gpr[i]);
- if ((i % 8) == 7)
- {
+ if ((i % 8) == 7) {
printf("\n");
}
}
@@ -108,6 +107,24 @@ _exception(int signr, struct pt_regs *regs)
panic("Exception in kernel pc %lx signal %d",regs->nip,signr);
}
+#ifdef CONFIG_PCI
+void dump_pci (void)
+{
+
+ volatile immap_t *immap = (immap_t *) CFG_IMMR;
+
+ printf ("PCI: err status %x err mask %x err ctrl %x\n",
+ le32_to_cpu (immap->im_pci.pci_esr),
+ le32_to_cpu (immap->im_pci.pci_emr),
+ le32_to_cpu (immap->im_pci.pci_ecr));
+ printf (" error address %x error data %x ctrl %x\n",
+ le32_to_cpu (immap->im_pci.pci_eacr),
+ le32_to_cpu (immap->im_pci.pci_edcr),
+ le32_to_cpu (immap->im_pci.pci_eccr));
+
+}
+#endif
+
void
MachineCheckException(struct pt_regs *regs)
{
@@ -117,6 +134,17 @@ MachineCheckException(struct pt_regs *regs)
* when a device is not present. Catch it and return to
* the PCI exception handler.
*/
+#ifdef CONFIG_PCI
+ volatile immap_t *immap = (immap_t *)CFG_IMMR;
+#ifdef DEBUG
+ dump_pci();
+#endif
+ /* clear the error in the error status register */
+ if(immap->im_pci.pci_esr && cpu_to_le32(PCI_ERROR_PCI_NO_RSP)) {
+ immap->im_pci.pci_esr = cpu_to_le32(PCI_ERROR_PCI_NO_RSP);
+ return;
+ }
+#endif
if ((fixup = search_exception_table(regs->nip)) != 0) {
regs->nip = fixup;
return;
@@ -130,8 +158,7 @@ MachineCheckException(struct pt_regs *regs)
printf("Machine check in kernel mode.\n");
printf("Caused by (from msr): ");
printf("regs %p ",regs);
- switch( regs->msr & 0x0000F000)
- {
+ switch( regs->msr & 0x0000F000) {
case (1<<12) :
printf("Machine check signal - probably due to mm fault\n"
"with mmu off\n");
@@ -150,6 +177,9 @@ MachineCheckException(struct pt_regs *regs)
}
show_regs(regs);
print_backtrace((unsigned long *)regs->gpr[1]);
+#ifdef CONFIG_PCI
+ dump_pci();
+#endif
panic("machine check");
}