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authorHaavard Skinnemoen <hskinnemoen@atmel.com>2007-08-13 16:34:33 +0200
committerHaavard Skinnemoen <hskinnemoen@atmel.com>2007-08-13 16:34:33 +0200
commit375c2c9e57ea5b8d678475379378f4774aa9cb88 (patch)
treec8499eaec089c8fe7c9eda562131f45b4a7738c6 /cpu/mpc8260/start.S
parentf0d1246ed7cb5a88522244c596d7ae7e6f161283 (diff)
parent9986bc3e40e899bea372a99a2bca4071bdf2e24b (diff)
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Merge commit 'upstream/master'
Diffstat (limited to 'cpu/mpc8260/start.S')
-rw-r--r--cpu/mpc8260/start.S8
1 files changed, 4 insertions, 4 deletions
diff --git a/cpu/mpc8260/start.S b/cpu/mpc8260/start.S
index 2e93bbb..7f5dc81 100644
--- a/cpu/mpc8260/start.S
+++ b/cpu/mpc8260/start.S
@@ -279,7 +279,7 @@ _start_of_vectors:
/* Alignment exception. */
. = 0x600
Alignment:
- EXCEPTION_PROLOG
+ EXCEPTION_PROLOG(SRR0, SRR1)
mfspr r4,DAR
stw r4,_DAR(r21)
mfspr r5,DSISR
@@ -298,7 +298,7 @@ Alignment:
/* Program check exception */
. = 0x700
ProgramCheck:
- EXCEPTION_PROLOG
+ EXCEPTION_PROLOG(SRR0, SRR1)
addi r3,r1,STACK_FRAME_OVERHEAD
li r20,MSR_KERNEL
rlwimi r20,r23,0,16,16 /* copy EE bit from saved MSR */
@@ -676,13 +676,13 @@ init_debug:
bdnz 1b
/* Load the Instruction Address Breakpoint Register (IABR). */
- /* */
+ /* */
/* The address to load is stored in the first word of dual port */
/* ram and should be preserved while the power is on, so you */
/* can plug addresses into that location then reset the cpu and */
/* this code will load that address into the IABR after the */
/* reset. */
- /* */
+ /* */
/* When the program counter matches the contents of the IABR, */
/* an exception is generated (before the instruction at that */
/* location completes). The vector for this exception is 0x1300 */