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authorGrzegorz Bernacki <gjb@semihalf.com>2007-09-07 17:46:18 +0200
committerRafal Jaworowski <raj@semihalf.com>2007-09-07 17:46:18 +0200
commit15ee4734e4e08003d73d9ead3ca80e2a0672e427 (patch)
tree3f175cf322df88a775a2ce86cce0dfe8486abfc1 /cpu/mpc8260/spi.c
parenta89cbbd27a60e6740772000fd0688ffba1c2576a (diff)
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[PPC440SPe] Convert machine check exceptions handling
Convert using fixup mechanism to suppressing MCK for the duration of config read/write transaction: while fixups work fine with the case of a precise exception, we identified a major drawback with this approach when there's an imprecise case. In this scenario there is the following race condition: the fixup is (by design) set to catch the instruction following the one actually causing the exception; if an interrupt (e.g. decrementer) happens between those two instructions, the ISR code is executed before the fixup handler the machine check is no longer protected by the fixup handler as it appears as within the ISR code. In consequence the fixup approach is being phased out and replaced with explicit suppressing of MCK during a PCIe config read/write cycle. Signed-off-by: Grzegorz Bernacki <gjb@semihalf.com>
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