summaryrefslogtreecommitdiff
path: root/cpu/mpc8260/pci.c
diff options
context:
space:
mode:
authorHeiko Schocher <hs@pollux.denx.de>2007-03-21 08:45:17 +0100
committerHeiko Schocher <hs@pollux.denx.de>2007-03-21 08:45:17 +0100
commit07e82cb2e284a893df6693f2a1337ab2c47bf6a1 (patch)
tree4ba9f6b0c706b16cd7900954e1cd44800abb9699 /cpu/mpc8260/pci.c
parent87e0662762b78ed7731f14add60ba0edb0479252 (diff)
downloadu-boot-imx-07e82cb2e284a893df6693f2a1337ab2c47bf6a1.zip
u-boot-imx-07e82cb2e284a893df6693f2a1337ab2c47bf6a1.tar.gz
u-boot-imx-07e82cb2e284a893df6693f2a1337ab2c47bf6a1.tar.bz2
[PATCH] TQM8272: dont change the bits given from the HRCW
for the SIUMCR and BCR Register. Fix the calculation for the EEprom Size Signed-off-by: Heiko Schocher <hs@denx.de>
Diffstat (limited to 'cpu/mpc8260/pci.c')
-rw-r--r--cpu/mpc8260/pci.c18
1 files changed, 1 insertions, 17 deletions
diff --git a/cpu/mpc8260/pci.c b/cpu/mpc8260/pci.c
index 1edd6fb..75c6ab2 100644
--- a/cpu/mpc8260/pci.c
+++ b/cpu/mpc8260/pci.c
@@ -275,22 +275,7 @@ void pci_mpc8250_init (struct pci_controller *hose)
| SIUMCR_BCTLC00
| SIUMCR_MMR11;
#elif defined(CONFIG_TQM8272)
-#if 0
- immap->im_siu_conf.sc_siumcr = (immap->im_siu_conf.sc_siumcr &
- ~SIUMCR_LBPC11 &
- ~SIUMCR_CS10PC11 &
- ~SIUMCR_LBPC11) |
- SIUMCR_LBPC01 |
- SIUMCR_CS10PC01 |
- SIUMCR_APPC10;
-#else
-#if 0
- immap->im_siu_conf.sc_siumcr = (immap->im_siu_conf.sc_siumcr |
- SIUMCR_APPC10);
-#else
- immap->im_siu_conf.sc_siumcr = 0x88000000;
-#endif
-#endif
+/* nothing to do for this Board here */
#else
/*
* Setting required to enable IRQ1-IRQ7 (SIUMCR [DPPC]),
@@ -304,7 +289,6 @@ void pci_mpc8250_init (struct pci_controller *hose)
SIUMCR_CS10PC01 |
SIUMCR_APPC10;
#endif
-printf("%s siumcr: %x\n", __FUNCTION__, immap->im_siu_conf.sc_siumcr);
/* Make PCI lowest priority */
/* Each 4 bits is a device bus request and the MS 4bits