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| author | Felix Radensky <felix@embedded-sol.com> | 2009-09-27 23:56:12 +0200 |
|---|---|---|
| committer | Stefan Roese <sr@denx.de> | 2009-10-02 13:53:28 +0200 |
| commit | d24bd2517a2b847f773453eab0ee5b1c8ebc74ba (patch) | |
| tree | f5e7c0f371867fc03adafc3da8fe2916b245e468 /cpu/mpc8260/ether_scc.c | |
| parent | 1d96cfe8f5eebfc6ea39d1a387f35ca4499e6b67 (diff) | |
| download | u-boot-imx-d24bd2517a2b847f773453eab0ee5b1c8ebc74ba.zip u-boot-imx-d24bd2517a2b847f773453eab0ee5b1c8ebc74ba.tar.gz u-boot-imx-d24bd2517a2b847f773453eab0ee5b1c8ebc74ba.tar.bz2 | |
ppc4xx: Reorganize DDR2 ECC handling
Reorganize DDR2 ECC handling to use common code for
SPD DIMMs and soldered SDRAM. Also, use common code
to display SDRAM info (ECC, CAS latency) for SPD and
soldered SDRAM variants.
Signed-off-by: Felix Radensky <felix@embedded-sol.com>
Signed-off-by: Stefan Roese <sr@denx.de>
Diffstat (limited to 'cpu/mpc8260/ether_scc.c')
0 files changed, 0 insertions, 0 deletions