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| author | Wolfgang Denk <wd@denx.de> | 2006-12-24 01:30:04 +0100 |
|---|---|---|
| committer | Wolfgang Denk <wd@denx.de> | 2006-12-24 01:30:04 +0100 |
| commit | bc5556d62b6ebe6cb4302aebec9e7bbf1affd2ea (patch) | |
| tree | bcb2fa6abc6e2b2ed36a06cd77bb7f869abbe92f /cpu/mpc8260/cpu_init.c | |
| parent | 1b3c360c235dc684ec06c2d5f183f0a282ce45e2 (diff) | |
| parent | fa23044564091f05d9695beb7b5b9a931e7f41a4 (diff) | |
| download | u-boot-imx-bc5556d62b6ebe6cb4302aebec9e7bbf1affd2ea.zip u-boot-imx-bc5556d62b6ebe6cb4302aebec9e7bbf1affd2ea.tar.gz u-boot-imx-bc5556d62b6ebe6cb4302aebec9e7bbf1affd2ea.tar.bz2 | |
Merge with /home/hs/TQ/u-boot-dev
Diffstat (limited to 'cpu/mpc8260/cpu_init.c')
| -rw-r--r-- | cpu/mpc8260/cpu_init.c | 28 |
1 files changed, 27 insertions, 1 deletions
diff --git a/cpu/mpc8260/cpu_init.c b/cpu/mpc8260/cpu_init.c index 640026b..7dcc949 100644 --- a/cpu/mpc8260/cpu_init.c +++ b/cpu/mpc8260/cpu_init.c @@ -28,6 +28,10 @@ DECLARE_GLOBAL_DATA_PTR; +#if defined(CONFIG_BOARD_GET_CPU_CLK_F) +extern unsigned long board_get_cpu_clk_f (void); +#endif + static void config_8260_ioports (volatile immap_t * immr) { int portnum; @@ -90,6 +94,7 @@ static void config_8260_ioports (volatile immap_t * immr) } } +#define SET_VAL_MASK(a, b, mask) ((a & mask) | (b & ~mask)) /* * Breath some life into the CPU... * @@ -102,6 +107,9 @@ void cpu_init_f (volatile immap_t * immr) #if !defined(CONFIG_COGENT) /* done in start.S for the cogent */ uint sccr; #endif +#if defined(CONFIG_BOARD_GET_CPU_CLK_F) + unsigned long cpu_clk; +#endif volatile memctl8260_t *memctl = &immr->im_memctl; extern void m8260_cpm_reset (void); @@ -119,10 +127,27 @@ void cpu_init_f (volatile immap_t * immr) immr->im_clkrst.car_rmr = CFG_RMR; /* BCR - Bus Configuration Register (4-25) */ +#if defined(CFG_BCR_60x) && (CFG_BCR_SINGLE) + if (immr->im_siu_conf.sc_bcr & BCR_EBM) { + immr->im_siu_conf.sc_bcr = CFG_BCR_60x; + } else { + immr->im_siu_conf.sc_bcr = CFG_BCR_SINGLE; + } +#else immr->im_siu_conf.sc_bcr = CFG_BCR; +#endif /* SIUMCR - contains debug pin configuration (4-31) */ +#if defined(CFG_SIUMCR_LOW) && (CFG_SIUMCR_HIGH) + cpu_clk = board_get_cpu_clk_f (); + if (cpu_clk >= 100000000) { + immr->im_siu_conf.sc_siumcr = CFG_SIUMCR_HIGH; + } else { + immr->im_siu_conf.sc_siumcr = CFG_SIUMCR_LOW; + } +#else immr->im_siu_conf.sc_siumcr = CFG_SIUMCR; +#endif config_8260_ioports (immr); @@ -157,7 +182,8 @@ void cpu_init_f (volatile immap_t * immr) #endif /* now restrict to preliminary range */ - memctl->memc_br0 = CFG_BR0_PRELIM; + /* the PS came from the HRCW, don´t change it */ + memctl->memc_br0 = SET_VAL_MASK(memctl->memc_br0 , CFG_BR0_PRELIM, BRx_PS_MSK); memctl->memc_or0 = CFG_OR0_PRELIM; #if defined(CFG_BR1_PRELIM) && defined(CFG_OR1_PRELIM) |