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authorKumar Gala <galak@kernel.crashing.org>2009-09-17 01:52:37 -0500
committerKumar Gala <galak@kernel.crashing.org>2009-09-24 12:05:29 -0500
commit3c2a67eec8a0facc865b400caca52e7f6b7adf01 (patch)
tree131a11003534635f5ae7a948ee4202e1e2d1c711 /cpu/mpc824x
parent7e4259bba4c56536760e42d32dacfb3233f216fd (diff)
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ppc/p4080: Handle timebase enabling and frequency reporting
On CoreNet style platforms the timebase frequency is the bus frequency defined by 16 (on PQ3 it is divide by 8). Also on the CoreNet platforms the core not longer controls the enabling of the timebase. We now need to enable the boot core's timebase via CCSR register writes. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
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