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author | wdenk <wdenk> | 2003-06-27 21:31:46 +0000 |
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committer | wdenk <wdenk> | 2003-06-27 21:31:46 +0000 |
commit | 8bde7f776c77b343aca29b8c7b58464d915ac245 (patch) | |
tree | 20f1fd99975215e7c658454a15cdb4ed4694e2d4 /cpu/mpc824x/drivers/i2o | |
parent | 993cad9364c6b87ae429d1ed1130d8153f6f027e (diff) | |
download | u-boot-imx-8bde7f776c77b343aca29b8c7b58464d915ac245.zip u-boot-imx-8bde7f776c77b343aca29b8c7b58464d915ac245.tar.gz u-boot-imx-8bde7f776c77b343aca29b8c7b58464d915ac245.tar.bz2 |
* Code cleanup:
- remove trailing white space, trailing empty lines, C++ comments, etc.
- split cmd_boot.c (separate cmd_bdinfo.c and cmd_load.c)
* Patches by Kenneth Johansson, 25 Jun 2003:
- major rework of command structure
(work done mostly by Michal Cendrowski and Joakim Kristiansen)
Diffstat (limited to 'cpu/mpc824x/drivers/i2o')
-rw-r--r-- | cpu/mpc824x/drivers/i2o/i2o.h | 66 | ||||
-rw-r--r-- | cpu/mpc824x/drivers/i2o/i2o1.c | 100 | ||||
-rw-r--r-- | cpu/mpc824x/drivers/i2o/i2o2.S | 11 |
3 files changed, 88 insertions, 89 deletions
diff --git a/cpu/mpc824x/drivers/i2o/i2o.h b/cpu/mpc824x/drivers/i2o/i2o.h index 26f7c5c..71572b2 100644 --- a/cpu/mpc824x/drivers/i2o/i2o.h +++ b/cpu/mpc824x/drivers/i2o/i2o.h @@ -124,11 +124,11 @@ typedef struct _i2o_im_stat PCI master needs to enable the devices' outbound interrupts it wants to handle (REMOTE) **/ extern I2OSTATUS I2OMsgEnable( LOCATION, /* REMOTE/LOCAL */ - unsigned int base, /* pcsrbar/eumbbar */ - unsigned char n ); /* b'1' - msg 0 - * b'10'- msg 1 - * b'11'- both - */ + unsigned int base, /* pcsrbar/eumbbar */ + unsigned char n ); /* b'1' - msg 0 + * b'10'- msg 1 + * b'11'- both + */ /** Disable the interrupt associated with in/out bound msg @@ -138,11 +138,11 @@ extern I2OSTATUS I2OMsgEnable( LOCATION, /* REMOTE/LOCAL */ PCI master needs to disable outbound interrupts of devices it is not interested (REMOTE) **/ extern I2OSTATUS I2OMsgDisable( LOCATION, /* REMOTE/LOCAL */ - unsigned int base, /* pcsrbar/eumbbar */ - unsigned char n ); /* b'1' - msg 0 - * b'10'- msg 1 - * b'11'- both - */ + unsigned int base, /* pcsrbar/eumbbar */ + unsigned char n ); /* b'1' - msg 0 + * b'10'- msg 1 + * b'11'- both + */ /** Read the msg register either from local inbound msg 0/1, @@ -155,9 +155,9 @@ extern I2OSTATUS I2OMsgDisable( LOCATION, /* REMOTE/LOCAL */ Otherwise local inbound msg is read. **/ extern I2OSTATUS I2OMsgGet ( LOCATION, /* REMOTE/LOCAL */ - unsigned int base, /*pcsrbar/eumbbar */ - unsigned int n, /* 0 or 1 */ - unsigned int *msg ); + unsigned int base, /*pcsrbar/eumbbar */ + unsigned int n, /* 0 or 1 */ + unsigned int *msg ); /** Write to nth Msg register either on local outbound msg 0/1, @@ -170,9 +170,9 @@ extern I2OSTATUS I2OMsgGet ( LOCATION, /* REMOTE/LOCAL */ Otherwise local outbound msg is written. **/ extern I2OSTATUS I2OMsgPost( LOCATION, /* REMOTE/LOCAL */ - unsigned int base, /*pcsrbar/eumbbar */ - unsigned int n, /* 0 or 1 */ - unsigned int msg ); + unsigned int base, /*pcsrbar/eumbbar */ + unsigned int n, /* 0 or 1 */ + unsigned int msg ); /** Enable the In/Out DoorBell Interrupt @@ -184,8 +184,8 @@ extern I2OSTATUS I2OMsgPost( LOCATION, /* REMOTE/LOCAL */ PCI master needs to enable outbound doorbell interrupts of the devices it wants to handle **/ extern I2OSTATUS I2ODBEnable( LOCATION, /* REMOTE/LOCAL */ - unsigned int base, /* pcsrbar/eumbbar */ - unsigned int in_db );/* when LOCAL, I2O_IN_DB, MC, I2O_IN_DB|MC */ + unsigned int base, /* pcsrbar/eumbbar */ + unsigned int in_db );/* when LOCAL, I2O_IN_DB, MC, I2O_IN_DB|MC */ /** Disable the In/Out DoorBell Interrupt @@ -196,8 +196,8 @@ extern I2OSTATUS I2ODBEnable( LOCATION, /* REMOTE/LOCAL */ **/ extern I2OSTATUS I2ODBDisable( LOCATION, /* REMOTE/LOCAL */ - unsigned int base, /* pcsrbar/eumbbar */ - unsigned int in_db ); /* when LOCAL, I2O_IN_DB, MC, I2O_IN_DB|MC */ + unsigned int base, /* pcsrbar/eumbbar */ + unsigned int in_db ); /* when LOCAL, I2O_IN_DB, MC, I2O_IN_DB|MC */ /** Read a local indoorbell register, or an outdoorbell of devices. @@ -210,7 +210,7 @@ extern I2OSTATUS I2ODBDisable( LOCATION, /* REMOTE/LOCAL */ Otherwise local in doorbell is read **/ extern unsigned int I2ODBGet( LOCATION, /* REMOTE/LOCAL */ - unsigned int base); /* pcsrbar/eumbbar */ + unsigned int base); /* pcsrbar/eumbbar */ /** Write to a local outdoorbell register, or an indoorbell register of devices. @@ -222,8 +222,8 @@ extern unsigned int I2ODBGet( LOCATION, /* REMOTE/LOCAL */ Otherwise local out doorbell is written **/ extern void I2ODBPost( LOCATION, /* REMOTE/LOCAL */ - unsigned int base, /* pcsrbar/eumbbar */ - unsigned int msg ); /* in / out */ + unsigned int base, /* pcsrbar/eumbbar */ + unsigned int msg ); /* in / out */ /** Read the outbound msg unit interrupt status of devices. Reading an interrupt status register, @@ -252,8 +252,8 @@ extern I2OSTATUS I2OInMsgStatGet( unsigned int eumbbar, I2OIMSTAT * ); MUCR. **/ extern I2OSTATUS I2OFIFOInit( unsigned int eumbbar, - QUEUE_SIZE, - unsigned int qba);/* queue base address that must be aligned at 1M */ + QUEUE_SIZE, + unsigned int qba);/* queue base address that must be aligned at 1M */ /** Enable the circular queue **/ @@ -297,8 +297,8 @@ extern void I2OFIFOOverflowIntDisable( unsigned int eumbbar ); Unless both free queues are initialized, allocating a free MF will return 0xffffffff **/ extern I2OSTATUS I2OFIFOAlloc( LOCATION, - unsigned int base, - void **pMsg); + unsigned int base, + void **pMsg); /** Free a used msg frame back to free queue PCI Master frees a MFA through outbound queue port of device(OFQPR) @@ -311,8 +311,8 @@ extern I2OSTATUS I2OFIFOAlloc( LOCATION, and by device to initialize Outbound free queue before I2OFIFOAlloc can be used. **/ extern I2OSTATUS I2OFIFOFree( LOCATION, - unsigned int base, - void *pMsg ); + unsigned int base, + void *pMsg ); /** Post a msg into FIFO @@ -323,8 +323,8 @@ extern I2OSTATUS I2OFIFOFree( LOCATION, Otherwise queue overflow interrupt will assert. **/ extern I2OSTATUS I2OFIFOPost( LOCATION, - unsigned int base, - void *pMsg ); + unsigned int base, + void *pMsg ); /** Read a msg from FIFO @@ -332,14 +332,14 @@ extern I2OSTATUS I2OFIFOPost( LOCATION, while local processor reads a msg from its inbound post queue(IPTPR) **/ extern I2OSTATUS I2OFIFOGet( LOCATION, - unsigned int base, + unsigned int base, void **pMsg ); /** Get the I2O PCI configuration identification register **/ extern I2OSTATUS I2OPCIConfigGet( LOCATION, - unsigned int base, + unsigned int base, I2OIOP *); #endif diff --git a/cpu/mpc824x/drivers/i2o/i2o1.c b/cpu/mpc824x/drivers/i2o/i2o1.c index d840af0..f058151 100644 --- a/cpu/mpc824x/drivers/i2o/i2o1.c +++ b/cpu/mpc824x/drivers/i2o/i2o1.c @@ -34,10 +34,10 @@ FIFOSTAT fifo_stat = { QSIZE_4K, 0xffffffff }; * PCI master needs to enable the outbound interrupts of devices it wants to handle(REMOTE) ************************************************************************************/ I2OSTATUS I2OMsgEnable ( LOCATION loc, /* REMOTE/LOCAL */ - unsigned int base, /* pcsrbar/eumbbar */ - unsigned char n ) /* b'1' - msg 0 - * b'10'- msg 1 - * b'11'- both + unsigned int base, /* pcsrbar/eumbbar */ + unsigned char n ) /* b'1' - msg 0 + * b'10'- msg 1 + * b'11'- both */ { unsigned int reg, val; @@ -73,8 +73,8 @@ I2OSTATUS I2OMsgEnable ( LOCATION loc, /* REMOTE/LOCAL */ * PCI master needs to disable outbound interrupts of devices it is not interested(REMOTE) *********************************************************************************/ I2OSTATUS I2OMsgDisable( LOCATION loc, /* REMOTE/LOCAL */ - unsigned int base, /* pcsrbar/eumbbar */ - unsigned char n ) /* b'1' - msg 0 + unsigned int base, /* pcsrbar/eumbbar */ + unsigned char n ) /* b'1' - msg 0 * b'10'- msg 1 * b'11'- both */ @@ -114,9 +114,9 @@ I2OSTATUS I2OMsgDisable( LOCATION loc, /* REMOTE/LOCAL */ * If it is remote, outbound msg on the device is read; otherwise local inbound msg is read *************************************************************************/ I2OSTATUS I2OMsgGet ( LOCATION loc, /* REMOTE/LOCAL */ - unsigned int base, /*pcsrbar/eumbbar */ - unsigned int n, /* 0 or 1 */ - unsigned int *msg ) + unsigned int base, /*pcsrbar/eumbbar */ + unsigned int n, /* 0 or 1 */ + unsigned int *msg ) { if ( n >= I2O_NUM_MSG || msg == 0 ) { @@ -151,9 +151,9 @@ I2OSTATUS I2OMsgGet ( LOCATION loc, /* REMOTE/LOCAL */ * If it is remote, inbound msg on the device is written; otherwise local outbound msg is written ***************************************************************/ I2OSTATUS I2OMsgPost( LOCATION loc, /* REMOTE/LOCAL */ - unsigned int base, /*pcsrbar/eumbbar */ - unsigned int n, /* 0 or 1 */ - unsigned int msg ) + unsigned int base, /*pcsrbar/eumbbar */ + unsigned int n, /* 0 or 1 */ + unsigned int msg ) { if ( n >= I2O_NUM_MSG ) { @@ -190,8 +190,8 @@ I2OSTATUS I2OMsgPost( LOCATION loc, /* REMOTE/LOCAL */ * PCI master needs to enable the outbound doorbell interrupts of device it wants to handle **********************************************************************/ I2OSTATUS I2ODBEnable( LOCATION loc, /* REMOTE/LOCAL */ - unsigned int base, /* pcsrbar/eumbbar */ - unsigned int in_db ) /* when LOCAL, I2O_IN_DB, MC, I2O_IN_DB|MC */ + unsigned int base, /* pcsrbar/eumbbar */ + unsigned int in_db ) /* when LOCAL, I2O_IN_DB, MC, I2O_IN_DB|MC */ { /* LOCATION - REMOTE : PCI master initializes outbound doorbell message of device @@ -209,15 +209,15 @@ I2OSTATUS I2ODBEnable( LOCATION loc, /* REMOTE/LOCAL */ /* pcsrbar is base */ val = load_runtime_reg( base, I2O_OMIMR ); val &= 0xfffffff7; - store_runtime_reg( base, I2O_OMIMR , val ); + store_runtime_reg( base, I2O_OMIMR , val ); } else { /* eumbbar is base */ val = load_runtime_reg( base, I2O_IMIMR); - in_db = ( (~in_db) & 0x3 ) << 3; - val = ( val & 0xffffffe7) | in_db; - store_runtime_reg( base, I2O_IMIMR, val ); + in_db = ( (~in_db) & 0x3 ) << 3; + val = ( val & 0xffffffe7) | in_db; + store_runtime_reg( base, I2O_IMIMR, val ); } return I2OSUCCESS; @@ -237,8 +237,8 @@ I2OSTATUS I2ODBEnable( LOCATION loc, /* REMOTE/LOCAL */ * PCI master needs to disable outbound doorbell interrupts of device it is not interested ************************************************************************************/ I2OSTATUS I2ODBDisable( LOCATION loc, /* REMOTE/LOCAL */ - unsigned int base, /* pcsrbar/eumbbar */ - unsigned int in_db ) /* when LOCAL, I2O_IN_DB, MC, I2O_IN_DB|MC */ + unsigned int base, /* pcsrbar/eumbbar */ + unsigned int in_db ) /* when LOCAL, I2O_IN_DB, MC, I2O_IN_DB|MC */ { /* LOCATION - REMOTE : handle device's out bound message initialization * LOCAL : handle local in bound message initialization @@ -255,14 +255,14 @@ I2OSTATUS I2ODBDisable( LOCATION loc, /* REMOTE/LOCAL */ /* pcsrbar is the base */ val = load_runtime_reg( base, I2O_OMIMR ); val |= 0x8; - store_runtime_reg( base, I2O_OMIMR, val ); + store_runtime_reg( base, I2O_OMIMR, val ); } else { val = load_runtime_reg( base, I2O_IMIMR); - in_db = ( in_db & 0x3 ) << 3; - val |= in_db; - store_runtime_reg( base, I2O_IMIMR, val ); + in_db = ( in_db & 0x3 ) << 3; + val |= in_db; + store_runtime_reg( base, I2O_IMIMR, val ); } return I2OSUCCESS; @@ -287,22 +287,22 @@ I2OSTATUS I2ODBDisable( LOCATION loc, /* REMOTE/LOCAL */ * will cause interrupt pending. *********************************************************************************/ unsigned int I2ODBGet( LOCATION loc, /* REMOTE/LOCAL */ - unsigned int base) /* pcsrbar/eumbbar */ + unsigned int base) /* pcsrbar/eumbbar */ { unsigned int msg, val; if ( loc == REMOTE ) { /* read outbound doorbell register of device, pcsrbar is the base */ - val = load_runtime_reg( base, I2O_ODBR ); - msg = val & 0xe0000000; - store_runtime_reg( base, I2O_ODBR, val ); /* clear the register */ + val = load_runtime_reg( base, I2O_ODBR ); + msg = val & 0xe0000000; + store_runtime_reg( base, I2O_ODBR, val ); /* clear the register */ } else { /* read the inbound doorbell register, eumbbar is the base */ - val = load_runtime_reg( base, I2O_IDBR ); - store_runtime_reg( base, I2O_IDBR, val ); /* clear the register */ + val = load_runtime_reg( base, I2O_IDBR ); + store_runtime_reg( base, I2O_IDBR, val ); /* clear the register */ msg = val; } @@ -323,8 +323,8 @@ unsigned int I2ODBGet( LOCATION loc, /* REMOTE/LOCAL */ * Otherwise local out doorbell is written *********************************************************************/ void I2ODBPost( LOCATION loc, /* REMOTE/LOCAL */ - unsigned int base, /* pcsrbar/eumbbar */ - unsigned int msg ) /* in / out */ + unsigned int base, /* pcsrbar/eumbbar */ + unsigned int msg ) /* in / out */ { if ( loc == REMOTE ) { @@ -527,8 +527,8 @@ void I2OFIFODisable( unsigned int eumbbar ) * ****************************************************/ I2OSTATUS I2OFIFOAlloc( LOCATION loc, - unsigned int base, - void **pMsg ) + unsigned int base, + void **pMsg ) { I2OSTATUS stat = I2OSUCCESS; void *pHdr, *pTil; @@ -543,12 +543,12 @@ I2OSTATUS I2OFIFOAlloc( LOCATION loc, { /* pcsrbar is the base and read the inbound free tail ptr */ pTil = (void *)load_runtime_reg( base, I2O_IFQPR ); - if ( ( (unsigned int)pTil & 0xFFFFFFF ) == 0xFFFFFFFF ) - { + if ( ( (unsigned int)pTil & 0xFFFFFFF ) == 0xFFFFFFFF ) + { stat = I2OQUEEMPTY; - } + } else - { + { *pMsg = pTil; } } @@ -562,7 +562,7 @@ I2OSTATUS I2OFIFOAlloc( LOCATION loc, if ( pHdr == pTil ) { /* hdr and til point to the same fifo item, no free MFA */ - stat = I2OQUEEMPTY; + stat = I2OQUEEMPTY; } else { @@ -615,7 +615,7 @@ I2OSTATUS I2OFIFOFree( LOCATION loc, { /* eumbbar is the base */ pHdr = (void **)load_runtime_reg( base, I2O_IFHPR ); - pTil = (void **)load_runtime_reg( base, I2O_IFTPR ); + pTil = (void **)load_runtime_reg( base, I2O_IFTPR ); /* store MFA */ *pHdr = pMsg; @@ -633,7 +633,7 @@ I2OSTATUS I2OFIFOFree( LOCATION loc, if ( pHdr != pTil ) { store_runtime_reg( base, I2O_OPHPR, (unsigned int)pHdr); - } + } else { stat = I2OQUEFULL; @@ -677,7 +677,7 @@ I2OSTATUS I2OFIFOPost( LOCATION loc, { /* eumbbar is the base */ pHdr = (void **)load_runtime_reg( base, I2O_OPHPR ); - pTil = (void **)load_runtime_reg( base, I2O_OPTPR ); + pTil = (void **)load_runtime_reg( base, I2O_OPTPR ); /* store MFA */ *pHdr = pMsg; @@ -695,7 +695,7 @@ I2OSTATUS I2OFIFOPost( LOCATION loc, if ( pHdr != pTil ) { store_runtime_reg( base, I2O_OPHPR, (unsigned int)pHdr); - } + } else { stat = I2OQUEFULL; @@ -734,12 +734,12 @@ I2OSTATUS I2OFIFOGet( LOCATION loc, { /* pcsrbar is the base */ pTil = (void *)load_runtime_reg( base, I2O_OFQPR ); - if ( ( (unsigned int)pTil & 0xFFFFFFF ) == 0xFFFFFFFF ) - { + if ( ( (unsigned int)pTil & 0xFFFFFFF ) == 0xFFFFFFFF ) + { stat = I2OQUEEMPTY; - } + } else - { + { *pMsg = pTil; } } @@ -753,7 +753,7 @@ I2OSTATUS I2OFIFOGet( LOCATION loc, if ( pHdr == pTil ) { /* no free MFA */ - stat = I2OQUEEMPTY; + stat = I2OQUEEMPTY; } else { @@ -783,8 +783,8 @@ I2OSTATUS I2OFIFOGet( LOCATION loc, * should pass eumbbar. *********************************************************/ I2OSTATUS I2OPCIConfigGet( LOCATION loc, - unsigned int base, - I2OIOP * val) + unsigned int base, + I2OIOP * val) { unsigned int tmp; if ( val == 0 ) diff --git a/cpu/mpc824x/drivers/i2o/i2o2.S b/cpu/mpc824x/drivers/i2o/i2o2.S index 1033979..990f9ef 100644 --- a/cpu/mpc824x/drivers/i2o/i2o2.S +++ b/cpu/mpc824x/drivers/i2o/i2o2.S @@ -19,12 +19,12 @@ load_runtime_reg: xor r5,r5,r5 - or r5,r5,r3 /* save eumbbar */ + or r5,r5,r3 /* save eumbbar */ lwbrx r3,r4,r5 sync - bclr 20, 0 + bclr 20, 0 /**************************************************************** * function: store_runtime_reg @@ -34,9 +34,9 @@ load_runtime_reg: * r5 - new value to be stored * ****************************************************************/ - .text - .align 2 - .global store_runtime_reg + .text + .align 2 + .global store_runtime_reg store_runtime_reg: xor r0,r0,r0 @@ -45,4 +45,3 @@ store_runtime_reg: sync bclr 20,0 - |