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author | wdenk <wdenk> | 2003-06-27 21:31:46 +0000 |
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committer | wdenk <wdenk> | 2003-06-27 21:31:46 +0000 |
commit | 8bde7f776c77b343aca29b8c7b58464d915ac245 (patch) | |
tree | 20f1fd99975215e7c658454a15cdb4ed4694e2d4 /cpu/mpc824x/cpu_init.c | |
parent | 993cad9364c6b87ae429d1ed1130d8153f6f027e (diff) | |
download | u-boot-imx-8bde7f776c77b343aca29b8c7b58464d915ac245.zip u-boot-imx-8bde7f776c77b343aca29b8c7b58464d915ac245.tar.gz u-boot-imx-8bde7f776c77b343aca29b8c7b58464d915ac245.tar.bz2 |
* Code cleanup:
- remove trailing white space, trailing empty lines, C++ comments, etc.
- split cmd_boot.c (separate cmd_bdinfo.c and cmd_load.c)
* Patches by Kenneth Johansson, 25 Jun 2003:
- major rework of command structure
(work done mostly by Michal Cendrowski and Joakim Kristiansen)
Diffstat (limited to 'cpu/mpc824x/cpu_init.c')
-rw-r--r-- | cpu/mpc824x/cpu_init.c | 12 |
1 files changed, 6 insertions, 6 deletions
diff --git a/cpu/mpc824x/cpu_init.c b/cpu/mpc824x/cpu_init.c index 602f65d..3b5fb79 100644 --- a/cpu/mpc824x/cpu_init.c +++ b/cpu/mpc824x/cpu_init.c @@ -84,7 +84,7 @@ cpu_init_f (void) " \ : /* no output */ \ : "r" (CONFIG_ADDR), "r" (CONFIG_DATA), \ - "r" (PCISWAP(addr & ~3)), "r" (PCISWAP(data << 16)) \ + "r" (PCISWAP(addr & ~3)), "r" (PCISWAP(data << 16)) \ ); M_CONFIG_WRITE_HALFWORD(PCIACR, 0x8000); @@ -145,8 +145,8 @@ cpu_init_f (void) #if defined(CFG_ASRISE) && defined(CFG_ASFALL) CONFIG_WRITE_WORD(MCCR2, CFG_REFINT << MCCR2_REFINT_SHIFT | - CFG_ASRISE << MCCR2_ASRISE_SHIFT | - CFG_ASFALL << MCCR2_ASFALL_SHIFT); + CFG_ASRISE << MCCR2_ASRISE_SHIFT | + CFG_ASFALL << MCCR2_ASFALL_SHIFT); #else CONFIG_WRITE_WORD(MCCR2, CFG_REFINT << MCCR2_REFINT_SHIFT); #endif @@ -196,13 +196,13 @@ cpu_init_f (void) CONFIG_WRITE_WORD(MCCR4, (CFG_PRETOACT << MCCR4_PRETOACT_SHIFT) | (CFG_ACTTOPRE << MCCR4_ACTTOPRE_SHIFT) | - (CFG_EXTROM ? MCCR4_EXTROM : 0) | - (CFG_REGDIMM ? MCCR4_REGDIMM : 0) | + (CFG_EXTROM ? MCCR4_EXTROM : 0) | + (CFG_REGDIMM ? MCCR4_REGDIMM : 0) | (CFG_REGISTERD_TYPE_BUFFER ? MCCR4_REGISTERED: 0) | ((CFG_BSTOPRE & 0x0003) <<MCCR4_BSTOPRE0TO1_SHIFT ) | (CFG_DBUS_SIZE2 << MCCR4_DBUS_SIZE2_SHIFT) | (((CFG_SDMODE_CAS_LAT <<4) | (CFG_SDMODE_WRAP <<3) | - (val ? 2 : 3)) << MCCR4_SDMODE_SHIFT) | + (val ? 2 : 3)) << MCCR4_SDMODE_SHIFT) | (CFG_ACTORW << MCCR4_ACTTORW_SHIFT) | (((CFG_BSTOPRE & 0x03c0) >> 6) <<MCCR4_BSTOPRE6TO9_SHIFT )); #else |