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| author | Kumar Gala <galak@kernel.crashing.org> | 2008-06-10 16:16:02 -0500 |
|---|---|---|
| committer | Andrew Fleming-AFLEMING <afleming@freescale.com> | 2008-06-11 01:53:09 -0500 |
| commit | ba04f7010958e88a8910f2a123fee53fdc72e013 (patch) | |
| tree | 73d8ef2f836c87e4d91fc7333915981e8588742b /cpu/mpc8220 | |
| parent | 859a86a25c569d3665ff413d1d923394b8a961f3 (diff) | |
| download | u-boot-imx-ba04f7010958e88a8910f2a123fee53fdc72e013.zip u-boot-imx-ba04f7010958e88a8910f2a123fee53fdc72e013.tar.gz u-boot-imx-ba04f7010958e88a8910f2a123fee53fdc72e013.tar.bz2 | |
FSL LAW: Add new interface to use the last free LAW
LAWs have the concept of priority so its useful to be able to allocate
the lowest (highest number) priority. We will end up using this with the
new DDR code.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Diffstat (limited to 'cpu/mpc8220')
0 files changed, 0 insertions, 0 deletions