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| author | Anish Trivedi <anish@freescale.com> | 2010-10-12 15:53:27 -0500 |
|---|---|---|
| committer | Anish Trivedi <anish@freescale.com> | 2010-10-13 10:55:55 -0500 |
| commit | 6369db51d0cb680b570a471829ceb5fe8d15c7d0 (patch) | |
| tree | d8b6d64a90c16b2eba73a5fb99c8ac8fd141c0b0 /cpu/mpc8220 | |
| parent | 6691350254ce4872cadf5bb3fd59c4a4fb61286e (diff) | |
| download | u-boot-imx-6369db51d0cb680b570a471829ceb5fe8d15c7d0.zip u-boot-imx-6369db51d0cb680b570a471829ceb5fe8d15c7d0.tar.gz u-boot-imx-6369db51d0cb680b570a471829ceb5fe8d15c7d0.tar.bz2 | |
ENGR00132526 MX50 RDP Update to latest LPDDR2 script
Update uboot LPDDR2 init code with the following changes
from latest script (v04) from Marek Xu:
http://compass.freescale.net/doc/220496654/Codex_LPDDR2_266MHz.inc.txt
1. Driver strength changed to 0x00180000 from 0x00200000
2. Memory type value changed to 0x04000000 from 0x02000000
3. New ZQ calibration entries with delay between load PU/PD and clear
4. Register at memory location 0x14000024 changed to 0x0048D005
from 0x0048EB05
Signed-off-by: Anish Trivedi <anish@freescale.com>
Diffstat (limited to 'cpu/mpc8220')
0 files changed, 0 insertions, 0 deletions