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| author | Kumar Gala <galak@kernel.crashing.org> | 2009-09-17 01:44:00 -0500 |
|---|---|---|
| committer | Kumar Gala <galak@kernel.crashing.org> | 2009-09-24 12:05:28 -0500 |
| commit | a880cf3e0e1c220d780eccd0b101170c4499485d (patch) | |
| tree | 5a1d6288e8127ce2de572afff2e8a42e0a4d06a3 /cpu/mpc5xxx | |
| parent | 418ec8584343f04048e2cc7ee96b6b29be54ad97 (diff) | |
| download | u-boot-imx-a880cf3e0e1c220d780eccd0b101170c4499485d.zip u-boot-imx-a880cf3e0e1c220d780eccd0b101170c4499485d.tar.gz u-boot-imx-a880cf3e0e1c220d780eccd0b101170c4499485d.tar.bz2 | |
ppc/p4080: CoreNet platfrom style CCSRBAR setting
On CoreNet based platforms the CCSRBAR address is split between an high &
low register and we no longer shift the address.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Signed-off-by: Scott Wood <scottwood@freescale.com>
Diffstat (limited to 'cpu/mpc5xxx')
0 files changed, 0 insertions, 0 deletions