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authorRafal Jaworowski <raj@pollux.denx.de>2006-03-29 13:17:09 +0200
committerRafal Jaworowski <raj@pollux.denx.de>2006-03-29 13:17:09 +0200
commitb66a9383421805c705654ce9456ec28c202819fb (patch)
tree4fb429d1b2402185225d8aed5fa551afff9b507a /cpu/mpc5xxx/cpu.c
parent7b4fd36b0322ec98836a8459d9be80e2777fdc05 (diff)
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Set SDelay register in the DDR controller for the MPC5200B chip.
Diffstat (limited to 'cpu/mpc5xxx/cpu.c')
-rw-r--r--cpu/mpc5xxx/cpu.c10
1 files changed, 5 insertions, 5 deletions
diff --git a/cpu/mpc5xxx/cpu.c b/cpu/mpc5xxx/cpu.c
index 2d695d1..8d1e7c6 100644
--- a/cpu/mpc5xxx/cpu.c
+++ b/cpu/mpc5xxx/cpu.c
@@ -38,7 +38,7 @@ int checkcpu (void)
ulong clock = gd->cpu_clk;
char buf[32];
#ifndef CONFIG_MGT5100
- uint svr;
+ uint svr, pvr;
#endif
puts ("CPU: ");
@@ -47,7 +47,8 @@ int checkcpu (void)
puts (CPU_ID_STR);
printf (" (JTAG ID %08lx)", *(vu_long *)MPC5XXX_CDM_JTAGID);
#else
- svr = get_svr ();
+ svr = get_svr();
+ pvr = get_pvr();
switch (SVR_VER (svr)) {
case SVR_MPC5200:
printf ("MPC5200");
@@ -57,11 +58,10 @@ int checkcpu (void)
break;
}
- printf (" v%d.%d", SVR_MJREV (svr), SVR_MNREV (svr));
+ printf (" v%d.%d, Core v%d.%d", SVR_MJREV (svr), SVR_MNREV (svr),
+ PVR_MAJ(pvr), PVR_MIN(pvr));
#endif
-
printf (" at %s MHz\n", strmhz (buf, clock));
-
return 0;
}