diff options
author | Wolfgang Denk <wd@denx.de> | 2008-10-18 21:59:44 +0200 |
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committer | Wolfgang Denk <wd@denx.de> | 2008-10-18 21:59:44 +0200 |
commit | f82642e33899766892499b163e60560fbbf87773 (patch) | |
tree | ab90f076f18e56b2b3e8c9375b95917daa78c1d9 /cpu/mpc5xx | |
parent | b59b16ca24bc7e77ec113021a6d77b9b32fcf192 (diff) | |
parent | 360fe71e82b83e264c964c9447c537e9a1f643c8 (diff) | |
download | u-boot-imx-f82642e33899766892499b163e60560fbbf87773.zip u-boot-imx-f82642e33899766892499b163e60560fbbf87773.tar.gz u-boot-imx-f82642e33899766892499b163e60560fbbf87773.tar.bz2 |
Merge 'next' branch
Conflicts:
board/freescale/mpc8536ds/mpc8536ds.c
include/configs/mgcoge.h
Signed-off-by: Wolfgang Denk <wd@denx.de>
Diffstat (limited to 'cpu/mpc5xx')
-rw-r--r-- | cpu/mpc5xx/cpu.c | 18 | ||||
-rw-r--r-- | cpu/mpc5xx/cpu_init.c | 48 | ||||
-rw-r--r-- | cpu/mpc5xx/interrupts.c | 12 | ||||
-rw-r--r-- | cpu/mpc5xx/serial.c | 12 | ||||
-rw-r--r-- | cpu/mpc5xx/speed.c | 4 | ||||
-rw-r--r-- | cpu/mpc5xx/spi.c | 16 | ||||
-rw-r--r-- | cpu/mpc5xx/start.S | 42 |
7 files changed, 76 insertions, 76 deletions
diff --git a/cpu/mpc5xx/cpu.c b/cpu/mpc5xx/cpu.c index 4bef90c..7fffebc 100644 --- a/cpu/mpc5xx/cpu.c +++ b/cpu/mpc5xx/cpu.c @@ -80,7 +80,7 @@ void watchdog_reset (void) { int re_enable = disable_interrupts (); - reset_5xx_watchdog ((immap_t *) CFG_IMMR); + reset_5xx_watchdog ((immap_t *) CONFIG_SYS_IMMR); if (re_enable) enable_interrupts (); } @@ -103,14 +103,14 @@ void reset_5xx_watchdog (volatile immap_t * immr) */ unsigned long get_tbclk (void) { - volatile immap_t *immr = (volatile immap_t *) CFG_IMMR; + volatile immap_t *immr = (volatile immap_t *) CONFIG_SYS_IMMR; ulong oscclk, factor; if (immr->im_clkrst.car_sccr & SCCR_TBS) { return (gd->cpu_clk / 16); } - factor = (((CFG_PLPRCR) & PLPRCR_MF_MSK) >> PLPRCR_MF_SHIFT) + 1; + factor = (((CONFIG_SYS_PLPRCR) & PLPRCR_MF_MSK) >> PLPRCR_MF_SHIFT) + 1; oscclk = gd->cpu_clk / factor; @@ -141,7 +141,7 @@ int dcache_status (void) int do_reset (cmd_tbl_t * cmdtp, int flag, int argc, char *argv[]) { #if defined(CONFIG_PATI) - volatile ulong *addr = (ulong *) CFG_RESET_ADDRESS; + volatile ulong *addr = (ulong *) CONFIG_SYS_RESET_ADDRESS; *addr = 1; #else ulong addr; @@ -155,15 +155,15 @@ int do_reset (cmd_tbl_t * cmdtp, int flag, int argc, char *argv[]) * Trying to execute the next instruction at a non-existing address * should cause a machine check, resulting in reset */ -#ifdef CFG_RESET_ADDRESS - addr = CFG_RESET_ADDRESS; +#ifdef CONFIG_SYS_RESET_ADDRESS + addr = CONFIG_SYS_RESET_ADDRESS; #else /* - * note: when CFG_MONITOR_BASE points to a RAM address, CFG_MONITOR_BASE * - sizeof (ulong) is usually a valid address. Better pick an address - * known to be invalid on your system and assign it to CFG_RESET_ADDRESS. + * note: when CONFIG_SYS_MONITOR_BASE points to a RAM address, CONFIG_SYS_MONITOR_BASE * - sizeof (ulong) is usually a valid address. Better pick an address + * known to be invalid on your system and assign it to CONFIG_SYS_RESET_ADDRESS. * "(ulong)-1" used to be a good choice for many systems... */ - addr = CFG_MONITOR_BASE - sizeof (ulong); + addr = CONFIG_SYS_MONITOR_BASE - sizeof (ulong); #endif ((void (*) (void)) addr) (); #endif /* #if defined(CONFIG_PATI) */ diff --git a/cpu/mpc5xx/cpu_init.c b/cpu/mpc5xx/cpu_init.c index 5bbb798..cb4bf84 100644 --- a/cpu/mpc5xx/cpu_init.c +++ b/cpu/mpc5xx/cpu_init.c @@ -41,74 +41,74 @@ void cpu_init_f (volatile immap_t * immr) /* SYPCR - contains watchdog control. This will enable watchdog */ /* if CONFIG_WATCHDOG is set */ - immr->im_siu_conf.sc_sypcr = CFG_SYPCR; + immr->im_siu_conf.sc_sypcr = CONFIG_SYS_SYPCR; #if defined(CONFIG_WATCHDOG) reset_5xx_watchdog (immr); #endif /* SIUMCR - contains debug pin configuration */ - immr->im_siu_conf.sc_siumcr |= CFG_SIUMCR; + immr->im_siu_conf.sc_siumcr |= CONFIG_SYS_SIUMCR; /* Initialize timebase. Unlock TBSCRK */ immr->im_sitk.sitk_tbscrk = KAPWR_KEY; - immr->im_sit.sit_tbscr = CFG_TBSCR; + immr->im_sit.sit_tbscr = CONFIG_SYS_TBSCR; /* Full IMB bus speed */ - immr->im_uimb.uimb_umcr = CFG_UMCR; + immr->im_uimb.uimb_umcr = CONFIG_SYS_UMCR; /* Time base and decrementer will be enables (TBE) */ /* in init_timebase() in time.c called from board_init_f(). */ /* Initialize the PIT. Unlock PISCRK */ immr->im_sitk.sitk_piscrk = KAPWR_KEY; - immr->im_sit.sit_piscr = CFG_PISCR; + immr->im_sit.sit_piscr = CONFIG_SYS_PISCR; #if !defined(CONFIG_PATI) /* PATI sest PLL in start.S */ /* PLL (CPU clock) settings */ immr->im_clkrstk.cark_plprcrk = KAPWR_KEY; - /* If CFG_PLPRCR (set in the various *_config.h files) tries to - * set the MF field, then just copy CFG_PLPRCR over car_plprcr, - * otherwise OR in CFG_PLPRCR so we do not change the currentMF + /* If CONFIG_SYS_PLPRCR (set in the various *_config.h files) tries to + * set the MF field, then just copy CONFIG_SYS_PLPRCR over car_plprcr, + * otherwise OR in CONFIG_SYS_PLPRCR so we do not change the currentMF * field value. */ -#if ((CFG_PLPRCR & PLPRCR_MF_MSK) != 0) - reg = CFG_PLPRCR; /* reset control bits */ +#if ((CONFIG_SYS_PLPRCR & PLPRCR_MF_MSK) != 0) + reg = CONFIG_SYS_PLPRCR; /* reset control bits */ #else reg = immr->im_clkrst.car_plprcr; reg &= PLPRCR_MF_MSK; /* isolate MF field */ - reg |= CFG_PLPRCR; /* reset control bits */ + reg |= CONFIG_SYS_PLPRCR; /* reset control bits */ #endif immr->im_clkrst.car_plprcr = reg; #endif /* !defined(CONFIG_PATI) */ - /* System integration timers. CFG_MASK has EBDF configuration */ + /* System integration timers. CONFIG_SYS_MASK has EBDF configuration */ immr->im_clkrstk.cark_sccrk = KAPWR_KEY; reg = immr->im_clkrst.car_sccr; reg &= SCCR_MASK; - reg |= CFG_SCCR; + reg |= CONFIG_SYS_SCCR; immr->im_clkrst.car_sccr = reg; /* Memory Controller */ - memctl->memc_br0 = CFG_BR0_PRELIM; - memctl->memc_or0 = CFG_OR0_PRELIM; + memctl->memc_br0 = CONFIG_SYS_BR0_PRELIM; + memctl->memc_or0 = CONFIG_SYS_OR0_PRELIM; -#if (defined(CFG_OR1_PRELIM) && defined(CFG_BR1_PRELIM)) - memctl->memc_or1 = CFG_OR1_PRELIM; - memctl->memc_br1 = CFG_BR1_PRELIM; +#if (defined(CONFIG_SYS_OR1_PRELIM) && defined(CONFIG_SYS_BR1_PRELIM)) + memctl->memc_or1 = CONFIG_SYS_OR1_PRELIM; + memctl->memc_br1 = CONFIG_SYS_BR1_PRELIM; #endif -#if defined(CFG_OR2_PRELIM) && defined(CFG_BR2_PRELIM) - memctl->memc_or2 = CFG_OR2_PRELIM; - memctl->memc_br2 = CFG_BR2_PRELIM; +#if defined(CONFIG_SYS_OR2_PRELIM) && defined(CONFIG_SYS_BR2_PRELIM) + memctl->memc_or2 = CONFIG_SYS_OR2_PRELIM; + memctl->memc_br2 = CONFIG_SYS_BR2_PRELIM; #endif -#if defined(CFG_OR3_PRELIM) && defined(CFG_BR3_PRELIM) - memctl->memc_or3 = CFG_OR3_PRELIM; - memctl->memc_br3 = CFG_BR3_PRELIM; +#if defined(CONFIG_SYS_OR3_PRELIM) && defined(CONFIG_SYS_BR3_PRELIM) + memctl->memc_or3 = CONFIG_SYS_OR3_PRELIM; + memctl->memc_br3 = CONFIG_SYS_BR3_PRELIM; #endif } diff --git a/cpu/mpc5xx/interrupts.c b/cpu/mpc5xx/interrupts.c index a4f47c7..167543f 100644 --- a/cpu/mpc5xx/interrupts.c +++ b/cpu/mpc5xx/interrupts.c @@ -52,11 +52,11 @@ static struct interrupt_action irq_vecs[NR_IRQS]; int interrupt_init_cpu (ulong *decrementer_count) { - volatile immap_t *immr = (immap_t *) CFG_IMMR; + volatile immap_t *immr = (immap_t *) CONFIG_SYS_IMMR; int vec; /* Decrementer used here for status led */ - *decrementer_count = get_tbclk () / CFG_HZ; + *decrementer_count = get_tbclk () / CONFIG_SYS_HZ; /* Disable all interrupts */ immr->im_siu_conf.sc_simask = 0; @@ -74,7 +74,7 @@ int interrupt_init_cpu (ulong *decrementer_count) */ void external_interrupt (struct pt_regs *regs) { - volatile immap_t *immr = (immap_t *) CFG_IMMR; + volatile immap_t *immr = (immap_t *) CONFIG_SYS_IMMR; int irq; ulong simask, newmask; ulong vec, v_bit; @@ -130,7 +130,7 @@ void external_interrupt (struct pt_regs *regs) void irq_install_handler (int vec, interrupt_handler_t * handler, void *arg) { - volatile immap_t *immr = (immap_t *) CFG_IMMR; + volatile immap_t *immr = (immap_t *) CONFIG_SYS_IMMR; /* SIU interrupt */ if (irq_vecs[vec].handler != NULL) { printf ("SIU interrupt %d 0x%x\n", @@ -148,7 +148,7 @@ void irq_install_handler (int vec, interrupt_handler_t * handler, void irq_free_handler (int vec) { - volatile immap_t *immr = (immap_t *) CFG_IMMR; + volatile immap_t *immr = (immap_t *) CONFIG_SYS_IMMR; /* SIU interrupt */ #if 0 printf ("Free CPM interrupt for vector %d\n", @@ -165,7 +165,7 @@ void irq_free_handler (int vec) */ void timer_interrupt_cpu (struct pt_regs *regs) { - volatile immap_t *immr = (immap_t *) CFG_IMMR; + volatile immap_t *immr = (immap_t *) CONFIG_SYS_IMMR; #if 0 printf ("*** Timer Interrupt *** "); diff --git a/cpu/mpc5xx/serial.c b/cpu/mpc5xx/serial.c index 39f57a1..88c6db8 100644 --- a/cpu/mpc5xx/serial.c +++ b/cpu/mpc5xx/serial.c @@ -48,7 +48,7 @@ static int ready_to_send(void); int serial_init (void) { - volatile immap_t *immr = (immap_t *)CFG_IMMR; + volatile immap_t *immr = (immap_t *)CONFIG_SYS_IMMR; serial_setbrg(); @@ -65,7 +65,7 @@ int serial_init (void) void serial_putc(const char c) { - volatile immap_t *immr = (immap_t *)CFG_IMMR; + volatile immap_t *immr = (immap_t *)CONFIG_SYS_IMMR; /* Test for completition */ if(ready_to_send()) { @@ -87,7 +87,7 @@ void serial_putc(const char c) int serial_getc(void) { - volatile immap_t *immr = (immap_t *)CFG_IMMR; + volatile immap_t *immr = (immap_t *)CONFIG_SYS_IMMR; volatile short status; unsigned char tmp; @@ -115,7 +115,7 @@ int serial_getc(void) int serial_tstc() { - volatile immap_t *immr = (immap_t *)CFG_IMMR; + volatile immap_t *immr = (immap_t *)CONFIG_SYS_IMMR; short status; /* New data character ? */ @@ -129,7 +129,7 @@ int serial_tstc() void serial_setbrg (void) { - volatile immap_t *immr = (immap_t *)CFG_IMMR; + volatile immap_t *immr = (immap_t *)CONFIG_SYS_IMMR; short scxbr; /* Set baudrate */ @@ -151,7 +151,7 @@ void serial_puts (const char *s) int ready_to_send(void) { - volatile immap_t *immr = (immap_t *)CFG_IMMR; + volatile immap_t *immr = (immap_t *)CONFIG_SYS_IMMR; volatile short status; do { diff --git a/cpu/mpc5xx/speed.c b/cpu/mpc5xx/speed.c index 7b7c5b9..ea5c1de 100644 --- a/cpu/mpc5xx/speed.c +++ b/cpu/mpc5xx/speed.c @@ -38,14 +38,14 @@ DECLARE_GLOBAL_DATA_PTR; */ int get_clocks (void) { - volatile immap_t *immr = (immap_t *) CFG_IMMR; + volatile immap_t *immr = (immap_t *) CONFIG_SYS_IMMR; #ifndef CONFIG_5xx_GCLK_FREQ uint divf = (immr->im_clkrst.car_plprcr & PLPRCR_DIVF_MSK); uint mf = ((immr->im_clkrst.car_plprcr & PLPRCR_MF_MSK) >> PLPRCR_MF_SHIFT); ulong vcoout; - vcoout = (CFG_OSC_CLK / (divf + 1)) * (mf + 1) * 2; + vcoout = (CONFIG_SYS_OSC_CLK / (divf + 1)) * (mf + 1) * 2; if(immr->im_clkrst.car_plprcr & PLPRCR_CSRC_MSK) { gd->cpu_clk = vcoout / (2^(((immr->im_clkrst.car_sccr & SCCR_DFNL_MSK) >> SCCR_DFNL_SHIFT) + 1)); } else { diff --git a/cpu/mpc5xx/spi.c b/cpu/mpc5xx/spi.c index 3c187be..3ca15ea 100644 --- a/cpu/mpc5xx/spi.c +++ b/cpu/mpc5xx/spi.c @@ -111,7 +111,7 @@ void spi_init_f (void) volatile immap_t *immr; volatile qsmcm5xx_t *qsmcm; - immr = (immap_t *) CFG_IMMR; + immr = (immap_t *) CONFIG_SYS_IMMR; qsmcm = (qsmcm5xx_t *)&immr->im_qsmcm; qsmcm->qsmcm_qsmcr = 0; /* all accesses enabled */ @@ -128,7 +128,7 @@ void spi_init_f (void) * PQSPAR[06] = 1 [0x0200] -> PERI: (SPIMOSI) * PQSPAR[07] = 1 [0x0100] -> PERI: (SPIMISO) * -------------------------------------------- */ - qsmcm->qsmcm_pqspar = 0x3 | (CFG_SPI_CS_USED << 3); + qsmcm->qsmcm_pqspar = 0x3 | (CONFIG_SYS_SPI_CS_USED << 3); /* -------------------------------------------- * DDRQS[00] = 0 reserved @@ -160,7 +160,7 @@ void spi_init_f (void) * PORTQS[14] = 0 [0x0002] -> SPIMOSI Output * PORTQS[15] = 0 [0x0001] -> SPIMISO Input * -------------------------------------------- */ - qsmcm->qsmcm_portqs |= (CFG_SPI_CS_BASE << 3); + qsmcm->qsmcm_portqs |= (CONFIG_SYS_SPI_CS_BASE << 3); /* -------------------------------------------- * Controll Register 0 * SPCR0[00] = 1 (0x8000) Master @@ -235,7 +235,7 @@ ssize_t short_spi_write (uchar *addr, int alen, uchar *buffer, int len) volatile immap_t *immr; volatile qsmcm5xx_t *qsmcm; - immr = (immap_t *) CFG_IMMR; + immr = (immap_t *) CONFIG_SYS_IMMR; qsmcm = (qsmcm5xx_t *)&immr->im_qsmcm; for(i=0;i<32;i++) { qsmcm->qsmcm_recram[i]=0x0000; @@ -308,7 +308,7 @@ ssize_t short_spi_read (uchar *addr, int alen, uchar *buffer, int len) volatile immap_t *immr; volatile qsmcm5xx_t *qsmcm; - immr = (immap_t *) CFG_IMMR; + immr = (immap_t *) CONFIG_SYS_IMMR; qsmcm = (qsmcm5xx_t *)&immr->im_qsmcm; for(i=0;i<32;i++) { @@ -364,15 +364,15 @@ ssize_t spi_xfer (size_t count) int i; int tm; ushort status; - immr = (immap_t *) CFG_IMMR; + immr = (immap_t *) CONFIG_SYS_IMMR; qsmcm = (qsmcm5xx_t *)&immr->im_qsmcm; DPRINT (("*** spi_xfer entered count %d***\n",count)); /* Set CS for device */ for(i=0;i<(count-1);i++) - qsmcm->qsmcm_comdram[i] = 0x80 | CFG_SPI_CS_ACT; /* CS3 is connected to the SPI EEPROM */ + qsmcm->qsmcm_comdram[i] = 0x80 | CONFIG_SYS_SPI_CS_ACT; /* CS3 is connected to the SPI EEPROM */ - qsmcm->qsmcm_comdram[i] = CFG_SPI_CS_ACT; /* CS3 is connected to the SPI EEPROM */ + qsmcm->qsmcm_comdram[i] = CONFIG_SYS_SPI_CS_ACT; /* CS3 is connected to the SPI EEPROM */ qsmcm->qsmcm_spcr2=((count-1)&0x1F)<<8; DPRINT (("*** spi_xfer: Bytes to be xferred: %d ***\n", count)); diff --git a/cpu/mpc5xx/start.S b/cpu/mpc5xx/start.S index 0637003..f2ffe84 100644 --- a/cpu/mpc5xx/start.S +++ b/cpu/mpc5xx/start.S @@ -87,7 +87,7 @@ version_string: .globl _start _start: mfspr r3, 638 - li r4, CFG_ISB /* Set ISB bit */ + li r4, CONFIG_SYS_ISB /* Set ISB bit */ or r3, r3, r4 mtspr 638, r3 li r21, BOOTFLAG_COLD /* Normal Power-On: Boot from FLASH */ @@ -121,12 +121,12 @@ boot_warm: /* the external flash access on PATI fails if programming the PLL to 40MHz. * Copy the PLL programming code to the internal RAM and execute it *----------------------------------------------------------------------*/ - lis r3, CFG_MONITOR_BASE@h - ori r3, r3, CFG_MONITOR_BASE@l + lis r3, CONFIG_SYS_MONITOR_BASE@h + ori r3, r3, CONFIG_SYS_MONITOR_BASE@l addi r3, r3, pll_prog_code_start - _start + EXC_OFF_SYS_RESET - lis r4, CFG_INIT_RAM_ADDR@h - ori r4, r4, CFG_INIT_RAM_ADDR@l + lis r4, CONFIG_SYS_INIT_RAM_ADDR@h + ori r4, r4, CONFIG_SYS_INIT_RAM_ADDR@l mtlr r4 addis r5,0,0x0 ori r5,r5,((pll_prog_code_end - pll_prog_code_start) >>2) @@ -144,8 +144,8 @@ boot_warm: * Calculate absolute address in FLASH and jump there *----------------------------------------------------------------------*/ - lis r3, CFG_MONITOR_BASE@h - ori r3, r3, CFG_MONITOR_BASE@l + lis r3, CONFIG_SYS_MONITOR_BASE@h + ori r3, r3, CONFIG_SYS_MONITOR_BASE@l addi r3, r3, in_flash - _start + EXC_OFF_SYS_RESET mtlr r3 blr @@ -155,9 +155,9 @@ in_flash: /* Initialize some SPRs that are hard to access from C */ /*----------------------------------------------------------------------*/ - lis r3, CFG_IMMR@h /* Pass IMMR as arg1 to C routine */ - lis r2, CFG_INIT_SP_ADDR@h - ori r1, r2, CFG_INIT_SP_ADDR@l /* Set up the stack in internal SRAM */ + lis r3, CONFIG_SYS_IMMR@h /* Pass IMMR as arg1 to C routine */ + lis r2, CONFIG_SYS_INIT_SP_ADDR@h + ori r1, r2, CONFIG_SYS_INIT_SP_ADDR@l /* Set up the stack in internal SRAM */ /* Note: R0 is still 0 here */ stwu r0, -4(r1) /* Clear final stack frame so that */ stwu r0, -4(r1) /* stack backtraces terminate cleanly */ @@ -173,8 +173,8 @@ in_flash: /* Set up debug mode entry */ - lis r2, CFG_DER@h - ori r2, r2, CFG_DER@l + lis r2, CONFIG_SYS_DER@h + ori r2, r2, CONFIG_SYS_DER@l mtspr DER, r2 /* Let the C-code set up the rest */ @@ -385,15 +385,15 @@ relocate_code: mr r10, r5 /* Save copy of monitor destination Address in SRAM */ mr r3, r5 /* Destination Address */ - lis r4, CFG_MONITOR_BASE@h /* Source Address */ - ori r4, r4, CFG_MONITOR_BASE@l + lis r4, CONFIG_SYS_MONITOR_BASE@h /* Source Address */ + ori r4, r4, CONFIG_SYS_MONITOR_BASE@l lwz r5, GOT(__init_end) sub r5, r5, r4 /* * Fix GOT pointer: * - * New GOT-PTR = (old GOT-PTR - CFG_MONITOR_BASE) + Destination Address + * New GOT-PTR = (old GOT-PTR - CONFIG_SYS_MONITOR_BASE) + Destination Address * * Offset: */ @@ -581,15 +581,15 @@ trap_reloc: #if defined(CONFIG_PATI) /* Program the PLL */ pll_prog_code_start: - lis r4, (CFG_IMMR + 0x002fc384)@h - ori r4, r4, (CFG_IMMR + 0x002fc384)@l + lis r4, (CONFIG_SYS_IMMR + 0x002fc384)@h + ori r4, r4, (CONFIG_SYS_IMMR + 0x002fc384)@l lis r3, (0x55ccaa33)@h ori r3, r3, (0x55ccaa33)@l stw r3, 0(r4) - lis r4, (CFG_IMMR + 0x002fc284)@h - ori r4, r4, (CFG_IMMR + 0x002fc284)@l - lis r3, CFG_PLPRCR@h - ori r3, r3, CFG_PLPRCR@l + lis r4, (CONFIG_SYS_IMMR + 0x002fc284)@h + ori r4, r4, (CONFIG_SYS_IMMR + 0x002fc284)@l + lis r3, CONFIG_SYS_PLPRCR@h + ori r3, r3, CONFIG_SYS_PLPRCR@l stw r3, 0(r4) addis r3,0,0x0 ori r3,r3,0xA000 |