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authorRafal Jaworowski <raj@semihalf.com>2008-01-15 12:52:31 +0100
committerWolfgang Denk <wd@denx.de>2008-02-14 22:00:41 +0100
commitf57d7d364ce189e39b0a64338d2f8012c074a2bd (patch)
treeb4ebdc84f73cfc2e9415b4b757cb0eded90c6610 /cpu/mpc512x
parentfe891ecf4d187e9d11dde869ed4623af52b54451 (diff)
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ppc: Refactor cache routines, so there is only one common set.
Signed-off-by: Rafal Jaworowski <raj@semihalf.com>
Diffstat (limited to 'cpu/mpc512x')
-rw-r--r--cpu/mpc512x/start.S46
1 files changed, 0 insertions, 46 deletions
diff --git a/cpu/mpc512x/start.S b/cpu/mpc512x/start.S
index 244c69b..5a9d868 100644
--- a/cpu/mpc512x/start.S
+++ b/cpu/mpc512x/start.S
@@ -479,52 +479,6 @@ get_pvr:
mfspr r3, PVR
blr
-/*------------------------------------------------------------------------------- */
-/* Function: ppcDcbf */
-/* Description: Data Cache block flush */
-/* Input: r3 = effective address */
-/* Output: none. */
-/*------------------------------------------------------------------------------- */
- .globl ppcDcbf
-ppcDcbf:
- dcbf r0,r3
- blr
-
-/*------------------------------------------------------------------------------- */
-/* Function: ppcDcbi */
-/* Description: Data Cache block Invalidate */
-/* Input: r3 = effective address */
-/* Output: none. */
-/*------------------------------------------------------------------------------- */
- .globl ppcDcbi
-ppcDcbi:
- dcbi r0,r3
- blr
-
-/*--------------------------------------------------------------------------
- * Function: ppcDcbz
- * Description: Data Cache block zero.
- * Input: r3 = effective address
- * Output: none.
- *-------------------------------------------------------------------------- */
-
- .globl ppcDcbz
-ppcDcbz:
- dcbz r0,r3
- blr
-
- .globl ppcDWstore
-ppcDWstore:
- lfd 1, 0(r4)
- stfd 1, 0(r3)
- blr
-
- .globl ppcDWload
-ppcDWload:
- lfd 1, 0(r3)
- stfd 1, 0(r4)
- blr
-
/*-------------------------------------------------------------------*/
/*