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authorWolfgang Denk <wd@pollux.(none)>2005-09-25 16:50:33 +0200
committerWolfgang Denk <wd@pollux.(none)>2005-09-25 16:50:33 +0200
commit7a22cd535b67e89af88190cd5143ba53f502f064 (patch)
treeaea616c948ead33b913a3fd774334d8ff63705b0 /cpu/mips
parent875c78934ee252744be1e5b2a9ad7ec5df239239 (diff)
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Fix au1x00_serial baud rate calculation:
remove hardcoded cpu clock divisor and use register instead; round up instead of truncate Patch by Andrew Dyer, 15 Feb 2005
Diffstat (limited to 'cpu/mips')
-rw-r--r--cpu/mips/au1x00_serial.c16
1 files changed, 14 insertions, 2 deletions
diff --git a/cpu/mips/au1x00_serial.c b/cpu/mips/au1x00_serial.c
index ac75da5..42c668e 100644
--- a/cpu/mips/au1x00_serial.c
+++ b/cpu/mips/au1x00_serial.c
@@ -70,9 +70,21 @@ void serial_setbrg (void)
{
volatile u32 *uart_clk = (volatile u32*)(UART0_ADDR+UART_CLK);
volatile u32 *uart_lcr = (volatile u32*)(UART0_ADDR+UART_LCR);
+ volatile u32 *sys_powerctrl = (u32 *)SYS_POWERCTRL;
+ int sd;
+ int divisorx2;
- /* Set baudrate - FIXME for bus speeds != CPU/2 */
- *uart_clk = ((CFG_HZ/(CONFIG_BAUDRATE * 64)));
+ /* sd is system clock divisor */
+ /* see section 10.4.5 in au1550 datasheet */
+ sd = (*sys_powerctrl & 0x03) + 2;
+
+ /* calulate 2x baudrate and round */
+ divisorx2 = ((CFG_HZ/(sd * 16 * CONFIG_BAUDRATE)));
+
+ if (divisorx2 & 0x01)
+ divisorx2 = divisorx2 + 1;
+
+ *uart_clk = divisorx2 / 2;
/* Set parity, stop bits and word length to 8N1 */
*uart_lcr = UART_LCR_WLEN8;