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author | Lily Zhang <r58066@freescale.com> | 2009-12-25 16:21:56 +0800 |
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committer | Lily Zhang <r58066@freescale.com> | 2009-12-25 16:24:49 +0800 |
commit | 5c5128b60555aa6a793eac9e507d5c984bd5f3ec (patch) | |
tree | 9eb69bee4da868388f87cf3c77407313e8d88ddc /cpu/mips/incaip_wdt.S | |
parent | 67b3137678e0ef7f405130b76671f35d0cba4617 (diff) | |
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ENGR00119591 Fix SPI-NOR reset issue
Add the workaround for ENGcm09397: reconfigure eCSPI SS signal
as GPIO before reset.
Signed-off-by: Lily Zhang <r58066@freescale.com>
Diffstat (limited to 'cpu/mips/incaip_wdt.S')
0 files changed, 0 insertions, 0 deletions