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| author | Haavard Skinnemoen <haavard.skinnemoen@atmel.com> | 2008-12-17 16:53:07 +0100 |
|---|---|---|
| committer | Haavard Skinnemoen <haavard.skinnemoen@atmel.com> | 2008-12-17 16:53:07 +0100 |
| commit | cb5473205206c7f14cbb1e747f28ec75b48826e2 (patch) | |
| tree | 8f4808d60917100b18a10b05230f7638a0a9bbcc /cpu/mips/cache.S | |
| parent | baf449fc5ff96f071bb0e3789fd3265f6d4fd9a0 (diff) | |
| parent | 92c78a3bbcb2ce508b4bf1c4a1e0940406a024bb (diff) | |
| download | u-boot-imx-cb5473205206c7f14cbb1e747f28ec75b48826e2.zip u-boot-imx-cb5473205206c7f14cbb1e747f28ec75b48826e2.tar.gz u-boot-imx-cb5473205206c7f14cbb1e747f28ec75b48826e2.tar.bz2 | |
Merge branch 'fixes' into cleanups
Conflicts:
board/atmel/atngw100/atngw100.c
board/atmel/atstk1000/atstk1000.c
cpu/at32ap/at32ap700x/gpio.c
include/asm-avr32/arch-at32ap700x/clk.h
include/configs/atngw100.h
include/configs/atstk1002.h
include/configs/atstk1003.h
include/configs/atstk1004.h
include/configs/atstk1006.h
include/configs/favr-32-ezkit.h
include/configs/hammerhead.h
include/configs/mimc200.h
Diffstat (limited to 'cpu/mips/cache.S')
| -rw-r--r-- | cpu/mips/cache.S | 16 |
1 files changed, 8 insertions, 8 deletions
diff --git a/cpu/mips/cache.S b/cpu/mips/cache.S index ee5d411..ff4f11c 100644 --- a/cpu/mips/cache.S +++ b/cpu/mips/cache.S @@ -208,9 +208,9 @@ LEAF(mips_init_dcache) */ NESTED(mips_cache_reset, 0, ra) move RA, ra - li t2, CFG_ICACHE_SIZE - li t3, CFG_DCACHE_SIZE - li t4, CFG_CACHELINE_SIZE + li t2, CONFIG_SYS_ICACHE_SIZE + li t3, CONFIG_SYS_DCACHE_SIZE + li t4, CONFIG_SYS_CACHELINE_SIZE move t5, t4 li v0, MIPS_MAX_CACHE_SIZE @@ -302,7 +302,7 @@ LEAF(dcache_enable) jr ra END(dcache_enable) -#ifdef CFG_INIT_RAM_LOCK_MIPS +#ifdef CONFIG_SYS_INIT_RAM_LOCK_MIPS /******************************************************************************* * * mips_cache_lock - lock RAM area pointed to by a0 in cache. @@ -311,9 +311,9 @@ LEAF(dcache_enable) * */ #if defined(CONFIG_PURPLE) -# define CACHE_LOCK_SIZE (CFG_DCACHE_SIZE/2) +# define CACHE_LOCK_SIZE (CONFIG_SYS_DCACHE_SIZE/2) #else -# define CACHE_LOCK_SIZE (CFG_DCACHE_SIZE) +# define CACHE_LOCK_SIZE (CONFIG_SYS_DCACHE_SIZE) #endif .globl mips_cache_lock .ent mips_cache_lock @@ -321,11 +321,11 @@ mips_cache_lock: li a1, CKSEG0 - CACHE_LOCK_SIZE addu a0, a1 li a2, CACHE_LOCK_SIZE - li a3, CFG_CACHELINE_SIZE + li a3, CONFIG_SYS_CACHELINE_SIZE move a1, a2 icacheop(a0,a1,a2,a3,0x1d) jr ra .end mips_cache_lock -#endif /* CFG_INIT_RAM_LOCK_MIPS */ +#endif /* CONFIG_SYS_INIT_RAM_LOCK_MIPS */ |