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authorShinya Kuribayashi <skuribay@ruby.dti.ne.jp>2008-05-03 13:51:28 +0900
committerShinya Kuribayashi <skuribay@ruby.dti.ne.jp>2008-05-03 13:51:28 +0900
commitea638951acead7f1086c908c0b9f086beab82a22 (patch)
tree80f1acc2e8b1c09351b0b978bb77563215a9f8f8 /cpu/mips/cache.S
parent50f93d30dae3c5d888aa244d964ccd77be9b1c0c (diff)
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[MIPS] cpu/mips/cache.S: Add dcache_enable
Recent bootelf command fixes (017e9b7925f74878d0e9475388cca9bda5ef9482, "allow ports to override bootelf behavior") requires ports to have this function. Signed-off-by: Shinya Kuribayashi <skuribay@ruby.dti.ne.jp> Acked-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Diffstat (limited to 'cpu/mips/cache.S')
-rw-r--r--cpu/mips/cache.S16
1 files changed, 16 insertions, 0 deletions
diff --git a/cpu/mips/cache.S b/cpu/mips/cache.S
index f593968..428d251 100644
--- a/cpu/mips/cache.S
+++ b/cpu/mips/cache.S
@@ -285,6 +285,22 @@ LEAF(dcache_disable)
jr ra
END(dcache_disable)
+/*******************************************************************************
+*
+* dcache_enable - enable cache
+*
+* RETURNS: N/A
+*
+*/
+LEAF(dcache_enable)
+ mfc0 t0, CP0_CONFIG
+ ori t0, CONF_CM_CMASK
+ xori t0, CONF_CM_CMASK
+ ori t0, CONF_CM_CACHABLE_NONCOHERENT
+ mtc0 t0, CP0_CONFIG
+ jr ra
+ END(dcache_enable)
+
#ifdef CFG_INIT_RAM_LOCK_MIPS
/*******************************************************************************
*