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| author | Marian Balakowicz <m8@semihalf.com> | 2005-10-28 22:30:33 +0200 |
|---|---|---|
| committer | Marian Balakowicz <m8@semihalf.com> | 2005-10-28 22:30:33 +0200 |
| commit | 63ff004c4fcad9f690bf44dbd15d568bb47aac2d (patch) | |
| tree | 7b64074a85da8118b6c862f14de1171b36ade0f7 /cpu/mips/au1x00_eth.c | |
| parent | fe93483a0ab9dcbf7794ffbf0b029ba138380e81 (diff) | |
| download | u-boot-imx-63ff004c4fcad9f690bf44dbd15d568bb47aac2d.zip u-boot-imx-63ff004c4fcad9f690bf44dbd15d568bb47aac2d.tar.gz u-boot-imx-63ff004c4fcad9f690bf44dbd15d568bb47aac2d.tar.bz2 | |
Add support for multiple PHYs.
Diffstat (limited to 'cpu/mips/au1x00_eth.c')
| -rw-r--r-- | cpu/mips/au1x00_eth.c | 15 |
1 files changed, 13 insertions, 2 deletions
diff --git a/cpu/mips/au1x00_eth.c b/cpu/mips/au1x00_eth.c index b7a7652..9ce9b35 100644 --- a/cpu/mips/au1x00_eth.c +++ b/cpu/mips/au1x00_eth.c @@ -63,6 +63,10 @@ #include <asm/io.h> #include <asm/au1x00.h> +#if (CONFIG_COMMANDS & CFG_CMD_MII) +#include <miiphy.h> +#endif + /* Ethernet Transmit and Receive Buffers */ #define DBUF_LENGTH 1520 #define PKT_MAXBUF_SIZE 1518 @@ -233,11 +237,17 @@ int au1x00_enet_initialize(bd_t *bis){ eth_register(dev); +#if (CONFIG_COMMANDS & CFG_CMD_MII) + miiphy_register(dev->name, + au1x00_miiphy_read, au1x00_miiphy_write); +#endif + return 1; } #if (CONFIG_COMMANDS & CFG_CMD_MII) -int miiphy_read(unsigned char addr, unsigned char reg, unsigned short * value) +int au1x00_miiphy_read(char *devname, unsigned char addr, + unsigned char reg, unsigned short * value) { volatile u32 *mii_control_reg = (volatile u32*)(ETH0_BASE+MAC_MII_CNTRL); volatile u32 *mii_data_reg = (volatile u32*)(ETH0_BASE+MAC_MII_DATA); @@ -269,7 +279,8 @@ int miiphy_read(unsigned char addr, unsigned char reg, unsigned short * value) return 0; } -int miiphy_write(unsigned char addr, unsigned char reg, unsigned short value) +int au1x00_miiphy_write(char *devname, unsigned char addr, + unsigned char reg, unsigned short value) { volatile u32 *mii_control_reg = (volatile u32*)(ETH0_BASE+MAC_MII_CNTRL); volatile u32 *mii_data_reg = (volatile u32*)(ETH0_BASE+MAC_MII_DATA); |