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author | Jon Loeliger <jdl@freescale.com> | 2008-06-06 10:48:31 -0500 |
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committer | Jon Loeliger <jdl@freescale.com> | 2008-06-06 10:48:31 -0500 |
commit | 1a247ba7fa5fb09f56892a09a990f03ce564b3e2 (patch) | |
tree | 9dab0ef013cc6dc7883454808ecf6ba4d7a7a94e /cpu/mips/asc_serial.c | |
parent | 2c289e320dcfb3760e99cf1d765cb067194a1202 (diff) | |
parent | 8155efbd7ae9c65564ca98affe94631d612ae088 (diff) | |
download | u-boot-imx-1a247ba7fa5fb09f56892a09a990f03ce564b3e2.zip u-boot-imx-1a247ba7fa5fb09f56892a09a990f03ce564b3e2.tar.gz u-boot-imx-1a247ba7fa5fb09f56892a09a990f03ce564b3e2.tar.bz2 |
Merge commit 'wd/master'
Diffstat (limited to 'cpu/mips/asc_serial.c')
-rw-r--r-- | cpu/mips/asc_serial.c | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/cpu/mips/asc_serial.c b/cpu/mips/asc_serial.c index d95ec3f..3498b61 100644 --- a/cpu/mips/asc_serial.c +++ b/cpu/mips/asc_serial.c @@ -34,10 +34,10 @@ /* Interrupt status register bits */ #define FBS_ISR_AT 0x00000040 /* ASC transmit interrupt */ -#define FBS_ISR_AR 0x00000020 /* ASC receive interrupt */ +#define FBS_ISR_AR 0x00000020 /* ASC receive interrupt */ #define FBS_ISR_AE 0x00000010 /* ASC error interrupt */ #define FBS_ISR_AB 0x00000008 /* ASC transmit buffer interrupt */ -#define FBS_ISR_AS 0x00000004 /* ASC start of autobaud detection interrupt */ +#define FBS_ISR_AS 0x00000004 /* ASC start of autobaud detection interrupt */ #define FBS_ISR_AF 0x00000002 /* ASC end of autobaud detection interrupt */ #else |