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authorJean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>2008-10-16 15:01:15 +0200
committerWolfgang Denk <wd@denx.de>2008-10-18 21:54:03 +0200
commit6d0f6bcf337c5261c08fabe12982178c2c489d76 (patch)
treeae13958ffa9c6b58c2ea97aac07a4ad2f04a350f /cpu/microblaze
parent71edc271816ec82cf0550dd6980be2da3cc2ad9e (diff)
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rename CFG_ macros to CONFIG_SYS
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Diffstat (limited to 'cpu/microblaze')
-rw-r--r--cpu/microblaze/exception.c2
-rw-r--r--cpu/microblaze/interrupts.c22
-rw-r--r--cpu/microblaze/start.S14
-rw-r--r--cpu/microblaze/timer.c12
4 files changed, 25 insertions, 25 deletions
diff --git a/cpu/microblaze/exception.c b/cpu/microblaze/exception.c
index d76b05a..0365de3 100644
--- a/cpu/microblaze/exception.c
+++ b/cpu/microblaze/exception.c
@@ -65,7 +65,7 @@ void _hw_exception_handler (void)
hang ();
}
-#ifdef CFG_USR_EXCEP
+#ifdef CONFIG_SYS_USR_EXCEP
void _exception_handler (void)
{
puts ("User vector_exception\n");
diff --git a/cpu/microblaze/interrupts.c b/cpu/microblaze/interrupts.c
index 26e88cb..a6021c9 100644
--- a/cpu/microblaze/interrupts.c
+++ b/cpu/microblaze/interrupts.c
@@ -45,19 +45,19 @@ int disable_interrupts (void)
return 0;
}
-#ifdef CFG_INTC_0
-#ifdef CFG_TIMER_0
+#ifdef CONFIG_SYS_INTC_0
+#ifdef CONFIG_SYS_TIMER_0
extern void timer_init (void);
#endif
-#ifdef CFG_FSL_2
+#ifdef CONFIG_SYS_FSL_2
extern void fsl_init2 (void);
#endif
-static struct irq_action vecs[CFG_INTC_0_NUM];
+static struct irq_action vecs[CONFIG_SYS_INTC_0_NUM];
/* mapping structure to interrupt controller */
-microblaze_intc_t *intc = (microblaze_intc_t *) (CFG_INTC_0_ADDR);
+microblaze_intc_t *intc = (microblaze_intc_t *) (CONFIG_SYS_INTC_0_ADDR);
/* default handler */
void def_hdlr (void)
@@ -100,7 +100,7 @@ void install_interrupt_handler (int irq, interrupt_handler_t * hdlr, void *arg)
{
struct irq_action *act;
/* irq out of range */
- if ((irq < 0) || (irq > CFG_INTC_0_NUM)) {
+ if ((irq < 0) || (irq > CONFIG_SYS_INTC_0_NUM)) {
puts ("IRQ out of range\n");
return;
}
@@ -135,17 +135,17 @@ int interrupts_init (void)
{
int i;
/* initialize irq list */
- for (i = 0; i < CFG_INTC_0_NUM; i++) {
+ for (i = 0; i < CONFIG_SYS_INTC_0_NUM; i++) {
vecs[i].handler = (interrupt_handler_t *) def_hdlr;
vecs[i].arg = (void *)i;
vecs[i].count = 0;
}
/* initialize intc controller */
intc_init ();
-#ifdef CFG_TIMER_0
+#ifdef CONFIG_SYS_TIMER_0
timer_init ();
#endif
-#ifdef CFG_FSL_2
+#ifdef CONFIG_SYS_FSL_2
fsl_init2 ();
#endif
enable_interrupts ();
@@ -191,7 +191,7 @@ void interrupt_handler (void)
#endif
#if defined(CONFIG_CMD_IRQ)
-#ifdef CFG_INTC_0
+#ifdef CONFIG_SYS_INTC_0
int do_irqinfo (cmd_tbl_t * cmdtp, int flag, int argc, char *argv[])
{
int i;
@@ -201,7 +201,7 @@ int do_irqinfo (cmd_tbl_t * cmdtp, int flag, int argc, char *argv[])
"Nr Routine Arg Count\n"
"-----------------------------\n");
- for (i = 0; i < CFG_INTC_0_NUM; i++) {
+ for (i = 0; i < CONFIG_SYS_INTC_0_NUM; i++) {
if (act->handler != (interrupt_handler_t*) def_hdlr) {
printf ("%02d %08x %08x %d\n", i,
(int)act->handler, (int)act->arg, act->count);
diff --git a/cpu/microblaze/start.S b/cpu/microblaze/start.S
index 8740284..2e9a08d 100644
--- a/cpu/microblaze/start.S
+++ b/cpu/microblaze/start.S
@@ -30,7 +30,7 @@
.global _start
_start:
mts rmsr, r0 /* disable cache */
- addi r1, r0, CFG_INIT_SP_OFFSET
+ addi r1, r0, CONFIG_SYS_INIT_SP_OFFSET
addi r1, r1, -4 /* Decrement SP to top of memory */
/* add opcode instruction for 32bit jump - 2 instruction imm & brai*/
addi r6, r0, 0xb0000000 /* hex b000 opcode imm */
@@ -45,9 +45,9 @@ _start:
swi r6, r0, 0x14 /* interrupt */
swi r6, r0, 0x24 /* hardware exception */
-#ifdef CFG_RESET_ADDRESS
+#ifdef CONFIG_SYS_RESET_ADDRESS
/* reset address */
- addik r6, r0, CFG_RESET_ADDRESS
+ addik r6, r0, CONFIG_SYS_RESET_ADDRESS
sw r6, r1, r0
lhu r7, r1, r0
shi r7, r0, 0x2
@@ -56,11 +56,11 @@ _start:
* Copy U-Boot code to TEXT_BASE
* solve problem with sbrk_base
*/
-#if (CFG_RESET_ADDRESS != TEXT_BASE)
+#if (CONFIG_SYS_RESET_ADDRESS != TEXT_BASE)
addi r4, r0, __end
addi r5, r0, __text_start
rsub r4, r5, r4 /* size = __end - __text_start */
- addi r6, r0, CFG_RESET_ADDRESS /* source address */
+ addi r6, r0, CONFIG_SYS_RESET_ADDRESS /* source address */
addi r7, r0, 0 /* counter */
4:
lw r8, r6, r7
@@ -71,7 +71,7 @@ _start:
#endif
#endif
-#ifdef CFG_USR_EXCEP
+#ifdef CONFIG_SYS_USR_EXCEP
/* user_vector_exception */
addik r6, r0, _exception_handler
sw r6, r1, r0
@@ -80,7 +80,7 @@ _start:
shi r6, r0, 0xe
#endif
-#ifdef CFG_INTC_0
+#ifdef CONFIG_SYS_INTC_0
/* interrupt_handler */
addik r6, r0, _interrupt_handler
sw r6, r1, r0
diff --git a/cpu/microblaze/timer.c b/cpu/microblaze/timer.c
index b350453..a91eabc 100644
--- a/cpu/microblaze/timer.c
+++ b/cpu/microblaze/timer.c
@@ -33,7 +33,7 @@ void reset_timer (void)
timestamp = 0;
}
-#ifdef CFG_TIMER_0
+#ifdef CONFIG_SYS_TIMER_0
ulong get_timer (ulong base)
{
return (timestamp - base);
@@ -50,9 +50,9 @@ void set_timer (ulong t)
timestamp = t;
}
-#ifdef CFG_INTC_0
-#ifdef CFG_TIMER_0
-microblaze_timer_t *tmr = (microblaze_timer_t *) (CFG_TIMER_0_ADDR);
+#ifdef CONFIG_SYS_INTC_0
+#ifdef CONFIG_SYS_TIMER_0
+microblaze_timer_t *tmr = (microblaze_timer_t *) (CONFIG_SYS_TIMER_0_ADDR);
void timer_isr (void *arg)
{
@@ -62,12 +62,12 @@ void timer_isr (void *arg)
void timer_init (void)
{
- tmr->loadreg = CFG_TIMER_0_PRELOAD;
+ tmr->loadreg = CONFIG_SYS_TIMER_0_PRELOAD;
tmr->control = TIMER_INTERRUPT | TIMER_RESET;
tmr->control =
TIMER_ENABLE | TIMER_ENABLE_INTR | TIMER_RELOAD | TIMER_DOWN_COUNT;
reset_timer ();
- install_interrupt_handler (CFG_TIMER_0_IRQ, timer_isr, (void *)tmr);
+ install_interrupt_handler (CONFIG_SYS_TIMER_0_IRQ, timer_isr, (void *)tmr);
}
#endif
#endif