summaryrefslogtreecommitdiff
path: root/cpu/microblaze/cache.c
diff options
context:
space:
mode:
authorStefan Roese <sr@denx.de>2007-04-12 14:06:54 +0200
committerStefan Roese <sr@denx.de>2007-04-12 14:06:54 +0200
commite8aac8e7bfc7cfdef5780f8f1d4c85184f59a06f (patch)
tree1a1ad4bb5f527d162154accd2a3b950956df7aeb /cpu/microblaze/cache.c
parenta65c5768e5537530bd1780af3d3fddc3113a163c (diff)
parent6c9ba919375db977aaad9146bf320c7afd07ae7a (diff)
downloadu-boot-imx-e8aac8e7bfc7cfdef5780f8f1d4c85184f59a06f.zip
u-boot-imx-e8aac8e7bfc7cfdef5780f8f1d4c85184f59a06f.tar.gz
u-boot-imx-e8aac8e7bfc7cfdef5780f8f1d4c85184f59a06f.tar.bz2
Merge with git://www.denx.de/git/u-boot.git
Diffstat (limited to 'cpu/microblaze/cache.c')
-rw-r--r--cpu/microblaze/cache.c48
1 files changed, 48 insertions, 0 deletions
diff --git a/cpu/microblaze/cache.c b/cpu/microblaze/cache.c
new file mode 100644
index 0000000..fc388eb
--- /dev/null
+++ b/cpu/microblaze/cache.c
@@ -0,0 +1,48 @@
+/*
+ * (C) Copyright 2007 Michal Simek
+ *
+ * Michal SIMEK <moonstr@monstr.eu>
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include <common.h>
+
+#if (CONFIG_COMMANDS & CFG_CMD_CACHE)
+
+int dcache_status (void)
+{
+ int i = 0;
+ int mask = 0x80;
+ __asm__ __volatile__ ("mfs %0,rmsr"::"r" (i):"memory");
+ /* i&=0x80 */
+ __asm__ __volatile__ ("and %0,%0,%1"::"r" (i), "r" (mask):"memory");
+ return i;
+}
+
+int icache_status (void)
+{
+ int i = 0;
+ int mask = 0x20;
+ __asm__ __volatile__ ("mfs %0,rmsr"::"r" (i):"memory");
+ /* i&=0x20 */
+ __asm__ __volatile__ ("and %0,%0,%1"::"r" (i), "r" (mask):"memory");
+ return i;
+}
+#endif