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authorStefan Roese <sr@denx.de>2007-05-18 11:20:02 +0200
committerStefan Roese <sr@denx.de>2007-05-18 11:20:02 +0200
commitee96088ca59d871ec096aefce04b741d1b02cb30 (patch)
tree6a97720507c4bbd57ec5f6a8faf09e0971e5449d /cpu/microblaze/cache.c
parentada4697d0230d6da552867777f98a67ec3ba2579 (diff)
parent70124c2602ae2d4c5d3dba05b482d91548242de8 (diff)
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Merge with git://www.denx.de/git/u-boot.git
Diffstat (limited to 'cpu/microblaze/cache.c')
-rwxr-xr-x[-rw-r--r--]cpu/microblaze/cache.c17
1 files changed, 17 insertions, 0 deletions
diff --git a/cpu/microblaze/cache.c b/cpu/microblaze/cache.c
index fc388eb..4f36a84 100644..100755
--- a/cpu/microblaze/cache.c
+++ b/cpu/microblaze/cache.c
@@ -23,6 +23,7 @@
*/
#include <common.h>
+#include <asm/asm.h>
#if (CONFIG_COMMANDS & CFG_CMD_CACHE)
@@ -45,4 +46,20 @@ int icache_status (void)
__asm__ __volatile__ ("and %0,%0,%1"::"r" (i), "r" (mask):"memory");
return i;
}
+
+void icache_enable (void) {
+ MSRSET(0x20);
+}
+
+void icache_disable(void) {
+ MSRCLR(0x20);
+}
+
+void dcache_enable (void) {
+ MSRSET(0x80);
+}
+
+void dcache_disable(void) {
+ MSRCLR(0x80);
+}
#endif