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author | Michal Simek <monstr@monstr.eu> | 2007-03-11 13:42:58 +0100 |
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committer | Michal Simek <monstr@monstr.eu> | 2007-03-11 13:42:58 +0100 |
commit | 76316a318de91f6184e7c22a10e02d275ade2441 (patch) | |
tree | 4be234e13852fa04688232dd6aa076dab58c542b /cpu/microblaze/cache.c | |
parent | fdd1d6dcc97c595bd9d598ed3b22a7038781272c (diff) | |
download | u-boot-imx-76316a318de91f6184e7c22a10e02d275ade2441.zip u-boot-imx-76316a318de91f6184e7c22a10e02d275ade2441.tar.gz u-boot-imx-76316a318de91f6184e7c22a10e02d275ade2441.tar.bz2 |
[Microblaze][PATCH]
timer support
interrupt controller support
flash support
ethernet support
cache support
board information support
env support
booting image support
adding support for Xilinx ML401
Diffstat (limited to 'cpu/microblaze/cache.c')
-rw-r--r-- | cpu/microblaze/cache.c | 48 |
1 files changed, 48 insertions, 0 deletions
diff --git a/cpu/microblaze/cache.c b/cpu/microblaze/cache.c new file mode 100644 index 0000000..fc388eb --- /dev/null +++ b/cpu/microblaze/cache.c @@ -0,0 +1,48 @@ +/* + * (C) Copyright 2007 Michal Simek + * + * Michal SIMEK <moonstr@monstr.eu> + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#include <common.h> + +#if (CONFIG_COMMANDS & CFG_CMD_CACHE) + +int dcache_status (void) +{ + int i = 0; + int mask = 0x80; + __asm__ __volatile__ ("mfs %0,rmsr"::"r" (i):"memory"); + /* i&=0x80 */ + __asm__ __volatile__ ("and %0,%0,%1"::"r" (i), "r" (mask):"memory"); + return i; +} + +int icache_status (void) +{ + int i = 0; + int mask = 0x20; + __asm__ __volatile__ ("mfs %0,rmsr"::"r" (i):"memory"); + /* i&=0x20 */ + __asm__ __volatile__ ("and %0,%0,%1"::"r" (i), "r" (mask):"memory"); + return i; +} +#endif |