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author | Michal Simek <monstr@monstr.eu> | 2007-05-07 19:25:08 +0200 |
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committer | Michal Simek <monstr@monstr.eu> | 2007-05-07 19:25:08 +0200 |
commit | f3f001a341ef185d0f13841be5b5dc3395aacc31 (patch) | |
tree | 9b4591f4917bde663b381e1493d3b3a4a21e6eef /cpu/microblaze/cache.c | |
parent | fb7c2dbef02c9f6f8d7b04ec4c2bfb91418b9c01 (diff) | |
download | u-boot-imx-f3f001a341ef185d0f13841be5b5dc3395aacc31.zip u-boot-imx-f3f001a341ef185d0f13841be5b5dc3395aacc31.tar.gz u-boot-imx-f3f001a341ef185d0f13841be5b5dc3395aacc31.tar.bz2 |
fix: remove asm code
Diffstat (limited to 'cpu/microblaze/cache.c')
-rw-r--r-- | cpu/microblaze/cache.c | 16 |
1 files changed, 16 insertions, 0 deletions
diff --git a/cpu/microblaze/cache.c b/cpu/microblaze/cache.c index fc388eb..683044c 100644 --- a/cpu/microblaze/cache.c +++ b/cpu/microblaze/cache.c @@ -45,4 +45,20 @@ int icache_status (void) __asm__ __volatile__ ("and %0,%0,%1"::"r" (i), "r" (mask):"memory"); return i; } + +void icache_enable (void) { + __asm__ __volatile__ ("msrset r0, 0x80"); +} + +void icache_disable(void) { + __asm__ __volatile__ ("msrclr r0, 0x80"); +} + +void dcache_enable (void) { + __asm__ __volatile__ ("msrset r0, 0x20"); +} + +void dcache_disable(void) { + __asm__ __volatile__ ("msrclr r0, 0x20"); +} #endif |