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author | Kumar Gala <galak@kernel.crashing.org> | 2008-09-08 08:51:29 -0500 |
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committer | Andrew Fleming-AFLEMING <afleming@freescale.com> | 2008-09-09 16:52:45 -0500 |
commit | e0ff3d350d6b7960deb5a881dfc5acf3a63ef676 (patch) | |
tree | bae9341cc649b87241a30b45b5cdb09a67f3627b /cpu/mcf547x_8x | |
parent | 650a9e7abc44ce1ce73d6668eaf0ba2d6b8025e9 (diff) | |
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85xx: Ensure timebase is zero on secondary cores
The e500um says the timebase is volatile out of reset. To ensure
TB sync works we need to make sure its zero.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Diffstat (limited to 'cpu/mcf547x_8x')
0 files changed, 0 insertions, 0 deletions