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| author | Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> | 2008-10-16 15:01:15 +0200 |
|---|---|---|
| committer | Wolfgang Denk <wd@denx.de> | 2008-10-18 21:54:03 +0200 |
| commit | 6d0f6bcf337c5261c08fabe12982178c2c489d76 (patch) | |
| tree | ae13958ffa9c6b58c2ea97aac07a4ad2f04a350f /cpu/mcf547x_8x/start.S | |
| parent | 71edc271816ec82cf0550dd6980be2da3cc2ad9e (diff) | |
| download | u-boot-imx-6d0f6bcf337c5261c08fabe12982178c2c489d76.zip u-boot-imx-6d0f6bcf337c5261c08fabe12982178c2c489d76.tar.gz u-boot-imx-6d0f6bcf337c5261c08fabe12982178c2c489d76.tar.bz2 | |
rename CFG_ macros to CONFIG_SYS
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Diffstat (limited to 'cpu/mcf547x_8x/start.S')
| -rw-r--r-- | cpu/mcf547x_8x/start.S | 34 |
1 files changed, 17 insertions, 17 deletions
diff --git a/cpu/mcf547x_8x/start.S b/cpu/mcf547x_8x/start.S index 87355f9..41fc694 100644 --- a/cpu/mcf547x_8x/start.S +++ b/cpu/mcf547x_8x/start.S @@ -29,9 +29,9 @@ #endif /* last three long word reserved for cache status */ -#define ICACHE_STATUS (CFG_INIT_RAM_ADDR+CFG_INIT_RAM_END- 4) -#define DCACHE_STATUS (CFG_INIT_RAM_ADDR+CFG_INIT_RAM_END- 8) -#define CACR_STATUS (CFG_INIT_RAM_ADDR+CFG_INIT_RAM_END-12) +#define ICACHE_STATUS (CONFIG_SYS_INIT_RAM_ADDR+CONFIG_SYS_INIT_RAM_END- 4) +#define DCACHE_STATUS (CONFIG_SYS_INIT_RAM_ADDR+CONFIG_SYS_INIT_RAM_END- 8) +#define CACR_STATUS (CONFIG_SYS_INIT_RAM_ADDR+CONFIG_SYS_INIT_RAM_END-12) #define _START _start #define _FAULT _fault @@ -132,16 +132,16 @@ _start: move.w #0x2700,%sr /* Mask off Interrupt */ /* Set vector base register at the beginning of the Flash */ - move.l #CFG_FLASH_BASE, %d0 + move.l #CONFIG_SYS_FLASH_BASE, %d0 movec %d0, %VBR - move.l #(CFG_INIT_RAM_ADDR + CFG_INIT_RAM_CTRL), %d0 + move.l #(CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_RAM_CTRL), %d0 movec %d0, %RAMBAR0 - move.l #(CFG_INIT_RAM1_ADDR + CFG_INIT_RAM1_CTRL), %d0 + move.l #(CONFIG_SYS_INIT_RAM1_ADDR + CONFIG_SYS_INIT_RAM1_CTRL), %d0 movec %d0, %RAMBAR1 - move.l #CFG_MBAR, %d0 /* set MBAR address */ + move.l #CONFIG_SYS_MBAR, %d0 /* set MBAR address */ move.c %d0, %MBAR /* invalidate and disable cache */ @@ -164,7 +164,7 @@ _start: /* set stackpointer to end of internal ram to get some stackspace for the first c-code */ - move.l #(CFG_INIT_RAM_ADDR + CFG_INIT_SP_OFFSET), %sp + move.l #(CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET), %sp clr.l %sp@- move.l #__got_start, %a5 /* put relocation table address to a5 */ @@ -195,7 +195,7 @@ relocate_code: move.l 12(%a6), %d0 /* Save copy of Global Data pointer */ move.l 16(%a6), %a0 /* Save copy of Destination Address */ - move.l #CFG_MONITOR_BASE, %a1 + move.l #CONFIG_SYS_MONITOR_BASE, %a1 move.l #__init_end, %a2 move.l %a0, %a3 @@ -210,7 +210,7 @@ relocate_code: * initialization, now running from RAM. */ move.l %a0, %a1 - add.l #(in_ram - CFG_MONITOR_BASE), %a1 + add.l #(in_ram - CONFIG_SYS_MONITOR_BASE), %a1 jmp (%a1) in_ram: @@ -220,9 +220,9 @@ clear_bss: * Now clear BSS segment */ move.l %a0, %a1 - add.l #(_sbss - CFG_MONITOR_BASE),%a1 + add.l #(_sbss - CONFIG_SYS_MONITOR_BASE),%a1 move.l %a0, %d1 - add.l #(_ebss - CFG_MONITOR_BASE),%d1 + add.l #(_ebss - CONFIG_SYS_MONITOR_BASE),%d1 6: clr.l (%a1)+ cmp.l %a1,%d1 @@ -232,11 +232,11 @@ clear_bss: * fix got table in RAM */ move.l %a0, %a1 - add.l #(__got_start - CFG_MONITOR_BASE),%a1 + add.l #(__got_start - CONFIG_SYS_MONITOR_BASE),%a1 move.l %a1,%a5 /* * fix got pointer register a5 */ move.l %a0, %a2 - add.l #(__got_end - CFG_MONITOR_BASE),%a2 + add.l #(__got_end - CONFIG_SYS_MONITOR_BASE),%a2 7: move.l (%a1),%d1 @@ -248,7 +248,7 @@ clear_bss: /* calculate relative jump to board_init_r in ram */ move.l %a0, %a1 - add.l #(board_init_r - CFG_MONITOR_BASE), %a1 + add.l #(board_init_r - CONFIG_SYS_MONITOR_BASE), %a1 /* set parameters for board_init_r */ move.l %a0,-(%sp) /* dest_addr */ @@ -281,7 +281,7 @@ _int_handler: /* cache functions */ .globl icache_enable icache_enable: - move.l #(CFG_SDRAM_BASE + 0x1c000), %d0 + move.l #(CONFIG_SYS_SDRAM_BASE + 0x1c000), %d0 movec %d0, %ACR2 /* Enable cache */ move.l #0x020C8100, %d0 /* Setup cache mask */ @@ -322,7 +322,7 @@ icache_status: dcache_enable: bsr icache_disable - move.l #(CFG_SDRAM_BASE + 0xc000), %d0 + move.l #(CONFIG_SYS_SDRAM_BASE + 0xc000), %d0 movec %d0, %ACR0 /* Enable cache */ move.l #0xA30C8100, %d0 /* Invalidate cache cmd */ |