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authorTsiChung Liew <tsicliew@gmail.com>2010-03-11 22:12:53 -0600
committerTsiChung Liew <tsicliew@gmail.com>2010-03-24 11:09:37 -0500
commitdd9f054ede433de73b137987fb3dc066e8d24ebb (patch)
treec4bafde866a253612976f0f3f8805093360c5c44 /cpu/mcf547x_8x/start.S
parentf628e2f72daee810aa568619b6629da68ad042d6 (diff)
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ColdFire: Cache update for all platforms
The CF will call cache functions in lib_m68/cache.c and the cache settings are defined in platform configuration file. Signed-off-by: TsiChung Liew <tsicliew@gmail.com>
Diffstat (limited to 'cpu/mcf547x_8x/start.S')
-rw-r--r--cpu/mcf547x_8x/start.S83
1 files changed, 1 insertions, 82 deletions
diff --git a/cpu/mcf547x_8x/start.S b/cpu/mcf547x_8x/start.S
index 94ef14b..8411862 100644
--- a/cpu/mcf547x_8x/start.S
+++ b/cpu/mcf547x_8x/start.S
@@ -24,16 +24,12 @@
#include <config.h>
#include <timestamp.h>
#include "version.h"
+#include <asm/cache.h>
#ifndef CONFIG_IDENT_STRING
#define CONFIG_IDENT_STRING ""
#endif
-/* last three long word reserved for cache status */
-#define ICACHE_STATUS (CONFIG_SYS_INIT_RAM_ADDR+CONFIG_SYS_INIT_RAM_END- 4)
-#define DCACHE_STATUS (CONFIG_SYS_INIT_RAM_ADDR+CONFIG_SYS_INIT_RAM_END- 8)
-#define CACR_STATUS (CONFIG_SYS_INIT_RAM_ADDR+CONFIG_SYS_INIT_RAM_END-12)
-
#define _START _start
#define _FAULT _fault
@@ -158,10 +154,8 @@ _start:
move.l #0, %d0
move.l #(ICACHE_STATUS), %a1 /* icache */
move.l #(DCACHE_STATUS), %a2 /* icache */
- move.l #(CACR_STATUS), %a3 /* CACR */
move.l %d0, (%a1)
move.l %d0, (%a2)
- move.l %d0, (%a3)
/* set stackpointer to end of internal ram to get some stackspace for the
first c-code */
@@ -279,81 +273,6 @@ _int_handler:
RESTORE_ALL
/*------------------------------------------------------------------------------*/
-/* cache functions */
- .globl icache_enable
-icache_enable:
- move.l #(CONFIG_SYS_SDRAM_BASE + 0x1c000), %d0
- movec %d0, %ACR2 /* Enable cache */
-
- move.l #0x020C8100, %d0 /* Setup cache mask */
- movec %d0, %CACR /* Enable cache */
- nop
-
- move.l #(ICACHE_STATUS), %a1
- moveq #1, %d0
- move.l %d0, (%a1)
- rts
-
- .globl icache_disable
-icache_disable:
- move.l #0x000C8100, %d0 /* Setup cache mask */
- movec %d0, %CACR /* Disable cache */
- clr.l %d0 /* Setup cache mask */
- movec %d0, %ACR2
- movec %d0, %ACR3
-
- move.l #(ICACHE_STATUS), %a1
- moveq #0, %d0
- move.l %d0, (%a1)
- rts
-
- .globl icache_invalid
-icache_invalid:
- move.l #0x000C8100, %d0 /* Setup cache mask */
- movec %d0, %CACR /* Enable cache */
- rts
-
- .globl icache_status
-icache_status:
- move.l #(ICACHE_STATUS), %a1
- move.l (%a1), %d0
- rts
-
- .globl dcache_enable
-dcache_enable:
- bsr icache_disable
-
- move.l #(CONFIG_SYS_SDRAM_BASE + 0xc000), %d0
- movec %d0, %ACR0 /* Enable cache */
-
- move.l #0xA30C8100, %d0 /* Invalidate cache cmd */
- movec %d0, %CACR /* Invalidate cache */
-
- move.l #(DCACHE_STATUS), %a1
- moveq #1, %d0
- move.l %d0, (%a1)
- rts
-
- .globl dcache_disable
-dcache_disable:
- move.l #0xA30C8100, %d0 /* Setup cache mask */
- movec %d0, %CACR /* Disable cache */
- clr.l %d0 /* Setup cache mask */
- movec %d0, %ACR0
- movec %d0, %ACR1
-
- move.l #(DCACHE_STATUS), %a1
- moveq #0, %d0
- move.l %d0, (%a1)
- rts
-
- .globl dcache_status
-dcache_status:
- move.l #(DCACHE_STATUS), %a1
- move.l (%a1), %d0
- rts
-
-/*------------------------------------------------------------------------------*/
.globl version_string
version_string: