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| author | Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> | 2008-10-16 15:01:15 +0200 |
|---|---|---|
| committer | Wolfgang Denk <wd@denx.de> | 2008-10-18 21:54:03 +0200 |
| commit | 6d0f6bcf337c5261c08fabe12982178c2c489d76 (patch) | |
| tree | ae13958ffa9c6b58c2ea97aac07a4ad2f04a350f /cpu/mcf5445x/speed.c | |
| parent | 71edc271816ec82cf0550dd6980be2da3cc2ad9e (diff) | |
| download | u-boot-imx-6d0f6bcf337c5261c08fabe12982178c2c489d76.zip u-boot-imx-6d0f6bcf337c5261c08fabe12982178c2c489d76.tar.gz u-boot-imx-6d0f6bcf337c5261c08fabe12982178c2c489d76.tar.bz2 | |
rename CFG_ macros to CONFIG_SYS
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Diffstat (limited to 'cpu/mcf5445x/speed.c')
| -rw-r--r-- | cpu/mcf5445x/speed.c | 14 |
1 files changed, 7 insertions, 7 deletions
diff --git a/cpu/mcf5445x/speed.c b/cpu/mcf5445x/speed.c index 6711a1d..9c0c077 100644 --- a/cpu/mcf5445x/speed.c +++ b/cpu/mcf5445x/speed.c @@ -94,7 +94,7 @@ int get_clocks(void) u16 fbpll_mask; #ifdef CONFIG_M54455EVB - volatile u8 *cpld = (volatile u8 *)(CFG_CS2_BASE + 3); + volatile u8 *cpld = (volatile u8 *)(CONFIG_SYS_CS2_BASE + 3); #endif u8 bootmode; @@ -145,7 +145,7 @@ int get_clocks(void) if (bootmode == 0) { /* RCON mode */ - vco = pPllmult[ccm->rcon & fbpll_mask] * CFG_INPUT_CLKSRC; + vco = pPllmult[ccm->rcon & fbpll_mask] * CONFIG_SYS_INPUT_CLKSRC; if ((vco < CLOCK_PLL_FVCO_MIN) || (vco > CLOCK_PLL_FVCO_MAX)) { /* invaild range, re-set in PCR */ @@ -154,7 +154,7 @@ int get_clocks(void) j = (pll->pcr & 0xFF000000) >> 24; for (i = j; i < 0xFF; i++) { - vco = i * CFG_INPUT_CLKSRC; + vco = i * CONFIG_SYS_INPUT_CLKSRC; if (vco >= CLOCK_PLL_FVCO_MIN) { bus = vco / temp; if (bus <= CLOCK_PLL_FSYS_MIN - MHZ) @@ -172,25 +172,25 @@ int get_clocks(void) gd->vco_clk = vco; /* Vco clock */ } else if (bootmode == 2) { /* Normal mode */ - vco = ((pll->pcr & 0xFF000000) >> 24) * CFG_INPUT_CLKSRC; + vco = ((pll->pcr & 0xFF000000) >> 24) * CONFIG_SYS_INPUT_CLKSRC; if ((vco < CLOCK_PLL_FVCO_MIN) || (vco > CLOCK_PLL_FVCO_MAX)) { /* Default value */ pcrvalue = (pll->pcr & 0x00FFFFFF); pcrvalue |= pPllmult[ccm->ccr & fbpll_mask] << 24; pll->pcr = pcrvalue; - vco = ((pll->pcr & 0xFF000000) >> 24) * CFG_INPUT_CLKSRC; + vco = ((pll->pcr & 0xFF000000) >> 24) * CONFIG_SYS_INPUT_CLKSRC; } gd->vco_clk = vco; /* Vco clock */ } else if (bootmode == 3) { /* serial mode */ - vco = ((pll->pcr & 0xFF000000) >> 24) * CFG_INPUT_CLKSRC; + vco = ((pll->pcr & 0xFF000000) >> 24) * CONFIG_SYS_INPUT_CLKSRC; gd->vco_clk = vco; /* Vco clock */ } if ((ccm->ccr & CCM_MISCCR_LIMP) == CCM_MISCCR_LIMP) { /* Limp mode */ } else { - gd->inp_clk = CFG_INPUT_CLKSRC; /* Input clock */ + gd->inp_clk = CONFIG_SYS_INPUT_CLKSRC; /* Input clock */ temp = (pll->pcr & PLL_PCR_OUTDIV1_MASK) + 1; gd->cpu_clk = vco / temp; /* cpu clock */ |