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author | TsiChungLiew <Tsi-Chung.Liew@freescale.com> | 2007-07-05 23:10:40 -0500 |
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committer | John Rigby <jrigby@freescale.com> | 2007-07-10 14:29:09 -0600 |
commit | 2e3f25ae9082daa9f5d181db45dfbc2e52ce0f97 (patch) | |
tree | 623b7791338652474fa7d506852b7734232143ef /cpu/mcf532x | |
parent | ddd104f1ed655eda50c06ba636237a83ed943f34 (diff) | |
download | u-boot-imx-2e3f25ae9082daa9f5d181db45dfbc2e52ce0f97.zip u-boot-imx-2e3f25ae9082daa9f5d181db45dfbc2e52ce0f97.tar.gz u-boot-imx-2e3f25ae9082daa9f5d181db45dfbc2e52ce0f97.tar.bz2 |
Create interrupts.c and modify Makefile
interrupt_init() and dtimer_intr_setup() are placed in interrupts.c. Added interrupts.o to Makefile
Signed-off-by: TsiChungLiew <Tsi-Chung.Liew@freescale.com>
Diffstat (limited to 'cpu/mcf532x')
-rw-r--r-- | cpu/mcf532x/Makefile | 2 | ||||
-rw-r--r-- | cpu/mcf532x/interrupts.c | 49 |
2 files changed, 50 insertions, 1 deletions
diff --git a/cpu/mcf532x/Makefile b/cpu/mcf532x/Makefile index 452848d..6790d90 100644 --- a/cpu/mcf532x/Makefile +++ b/cpu/mcf532x/Makefile @@ -28,7 +28,7 @@ include $(TOPDIR)/config.mk LIB = lib$(CPU).a START = -COBJS = cpu.o speed.o cpu_init.o +COBJS = cpu.o speed.o cpu_init.o interrupts.o SRCS := $(START:.o=.S) $(SOBJS:.o=.S) $(COBJS:.o=.c) OBJS := $(addprefix $(obj),$(SOBJS) $(COBJS)) diff --git a/cpu/mcf532x/interrupts.c b/cpu/mcf532x/interrupts.c new file mode 100644 index 0000000..ff50d7d --- /dev/null +++ b/cpu/mcf532x/interrupts.c @@ -0,0 +1,49 @@ +/* + * + * Copyright (C) 2004-2007 Freescale Semiconductor, Inc. + * TsiChung Liew (Tsi-Chung.Liew@freescale.com) + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +/* CPU specific interrupt routine */ +#include <common.h> +#include <asm/immap.h> + +int interrupt_init(void) +{ + volatile int0_t *intp = (int0_t *) (CFG_INTR_BASE); + + /* Make sure all interrupts are disabled */ + intp->imrh0 |= 0xFFFFFFFF; + intp->imrl0 |= 0xFFFFFFFF; + + enable_interrupts(); + return 0; +} + +#if defined(CONFIG_MCFTMR) +void dtimer_intr_setup(void) +{ + volatile int0_t *intp = (int0_t *) (CFG_INTR_BASE); + + intp->icr0[CFG_TMRINTR_NO] = CFG_TMRINTR_PRI; + intp->imrh0 &= ~CFG_TMRINTR_MASK; +} +#endif |