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| author | Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> | 2008-10-16 15:01:15 +0200 |
|---|---|---|
| committer | Wolfgang Denk <wd@denx.de> | 2008-10-18 21:54:03 +0200 |
| commit | 6d0f6bcf337c5261c08fabe12982178c2c489d76 (patch) | |
| tree | ae13958ffa9c6b58c2ea97aac07a4ad2f04a350f /cpu/mcf532x/speed.c | |
| parent | 71edc271816ec82cf0550dd6980be2da3cc2ad9e (diff) | |
| download | u-boot-imx-6d0f6bcf337c5261c08fabe12982178c2c489d76.zip u-boot-imx-6d0f6bcf337c5261c08fabe12982178c2c489d76.tar.gz u-boot-imx-6d0f6bcf337c5261c08fabe12982178c2c489d76.tar.bz2 | |
rename CFG_ macros to CONFIG_SYS
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Diffstat (limited to 'cpu/mcf532x/speed.c')
| -rw-r--r-- | cpu/mcf532x/speed.c | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/cpu/mcf532x/speed.c b/cpu/mcf532x/speed.c index a11e425..1e40374 100644 --- a/cpu/mcf532x/speed.c +++ b/cpu/mcf532x/speed.c @@ -197,7 +197,7 @@ int clock_pll(int fsys, int flags) */ /* software workaround for SDRAM opeartion after exiting LIMP mode errata */ - *sdram_workaround = CFG_SDRAM_BASE; + *sdram_workaround = CONFIG_SYS_SDRAM_BASE; /* wait for DQS logic to relock */ for (i = 0; i < 0x200; i++) ; @@ -210,7 +210,7 @@ int clock_pll(int fsys, int flags) */ int get_clocks(void) { - gd->bus_clk = clock_pll(CFG_CLK / 1000, 0) * 1000; + gd->bus_clk = clock_pll(CONFIG_SYS_CLK / 1000, 0) * 1000; gd->cpu_clk = (gd->bus_clk * 3); #ifdef CONFIG_FSL_I2C |