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author | John Rigby <jrigby@freescale.com> | 2007-08-16 17:40:03 -0600 |
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committer | John Rigby <jrigby@freescale.com> | 2007-08-16 17:40:03 -0600 |
commit | 81735b2568cf634d601c0d4a1bbc3a3882bc8eda (patch) | |
tree | 521d22623e48f6923b4cda08a36cc26a9cc9abde /cpu/mcf532x/interrupts.c | |
parent | d35b508a55508535b6e8445b718585d27df733d3 (diff) | |
parent | d61ea14885631e58a25feaa81ee82eb464c62d6a (diff) | |
download | u-boot-imx-81735b2568cf634d601c0d4a1bbc3a3882bc8eda.zip u-boot-imx-81735b2568cf634d601c0d4a1bbc3a3882bc8eda.tar.gz u-boot-imx-81735b2568cf634d601c0d4a1bbc3a3882bc8eda.tar.bz2 |
Merge branch 'denx-coldfire' into coldfire-aug2007
Diffstat (limited to 'cpu/mcf532x/interrupts.c')
-rw-r--r-- | cpu/mcf532x/interrupts.c | 49 |
1 files changed, 49 insertions, 0 deletions
diff --git a/cpu/mcf532x/interrupts.c b/cpu/mcf532x/interrupts.c new file mode 100644 index 0000000..ff50d7d --- /dev/null +++ b/cpu/mcf532x/interrupts.c @@ -0,0 +1,49 @@ +/* + * + * Copyright (C) 2004-2007 Freescale Semiconductor, Inc. + * TsiChung Liew (Tsi-Chung.Liew@freescale.com) + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +/* CPU specific interrupt routine */ +#include <common.h> +#include <asm/immap.h> + +int interrupt_init(void) +{ + volatile int0_t *intp = (int0_t *) (CFG_INTR_BASE); + + /* Make sure all interrupts are disabled */ + intp->imrh0 |= 0xFFFFFFFF; + intp->imrl0 |= 0xFFFFFFFF; + + enable_interrupts(); + return 0; +} + +#if defined(CONFIG_MCFTMR) +void dtimer_intr_setup(void) +{ + volatile int0_t *intp = (int0_t *) (CFG_INTR_BASE); + + intp->icr0[CFG_TMRINTR_NO] = CFG_TMRINTR_PRI; + intp->imrh0 &= ~CFG_TMRINTR_MASK; +} +#endif |